From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Burakov, Anatoly" Subject: Re: [PATCH v3] bus/pci: forbid VA as IOVA mode if IOMMU address width too small Date: Fri, 12 Jan 2018 11:10:51 +0000 Message-ID: <89c16dd0-3938-f9ae-cc9f-189388abc0a9@intel.com> References: <20180112102220.20061-1-maxime.coquelin@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Cc: peterx@redhat.com To: Maxime Coquelin , dev@dpdk.org, stable@dpdk.org, jianfeng.tan@intel.com, qi.z.zhang@intel.com, stephen@networkplumber.org, santosh.shukla@caviumnetworks.com, thomas@monjalon.net Return-path: In-Reply-To: <20180112102220.20061-1-maxime.coquelin@redhat.com> Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > +#if defined(RTE_ARCH_X86) > +static bool > +pci_one_device_iommu_support_va(struct rte_pci_device *dev) > +{ > +#define VTD_CAP_MGAW_SHIFT 16 > +#define VTD_CAP_MGAW_MASK (0x3fULL << VTD_CAP_MGAW_SHIFT) > +#define X86_VA_WIDTH 47 /* From Documentation/x86/x86_64/mm.txt */ > + struct rte_pci_addr *addr = &dev->addr; > + char filename[PATH_MAX]; > + FILE *fp; > + uint64_t mgaw, vtd_cap_reg = 0; > + > + snprintf(filename, sizeof(filename), > + "%s/" PCI_PRI_FMT "/iommu/intel-iommu/cap", > + rte_pci_get_sysfs_path(), addr->domain, addr->bus, addr->devid, > + addr->function); > + if (access(filename, F_OK) == -1) { > + /* We don't have an Intel IOMMU, assume VA supported*/ > + return true; > + } > + > + /* We have an intel IOMMU */ > + fp = fopen(filename, "r"); > + if (fp == NULL) { > + RTE_LOG(ERR, EAL, "%s(): can't open %s\n", __func__, filename); > + return false; > + } > + > + if (fscanf(fp, "%lx", &vtd_cap_reg) != 1) { > + RTE_LOG(ERR, EAL, "%s(): can't read %s\n", __func__, filename); > + fclose(fp); > + return false; > + } > + > + fclose(fp); Hi Maxime, You probably want to use eal_parse_sysfs_value() for this. -- Thanks, Anatoly