From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ferruh Yigit <ferruh.yigit@intel.com>
Subject: Re: [PATCH v4 12/26] net/bnxt: add support to set MTU
Date: Tue, 6 Jun 2017 13:47:58 +0100
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References: <20170601030232.38677-1-ajit.khaparde@broadcom.com>
 <20170601170723.48709-1-ajit.khaparde@broadcom.com>
 <20170601170723.48709-13-ajit.khaparde@broadcom.com>
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Cc: Steeven Li <steeven.li@broadcom.com>
To: Ajit Khaparde <ajit.khaparde@broadcom.com>, dev@dpdk.org
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On 6/1/2017 6:07 PM, Ajit Khaparde wrote:
> This patch adds support to modify MTU using the set_mtu dev_op.
> To support frames > 2k, the PMD creates an aggregator ring.
> When a frame greater than 2k is received, it is fragmented
> and the resulting fragments are DMA'ed to the aggregator ring.
> Now the driver can support jumbo frames upto 9500 bytes.
> 
> Signed-off-by: Steeven Li <steeven.li@broadcom.com>
> Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
> 
> --
> v1->v2: regroup related patches and incorporate other review comments
> 
> v2->v3:
>   - rebasing to next-net tree
>   - Use net/bnxt instead of just bnxt in patch subject

<...>

> +int bnxt_hwrm_vnic_plcmode_cfg(struct bnxt *bp,
> +			struct bnxt_vnic_info *vnic)
> +{
> +	int rc = 0;
> +	struct hwrm_vnic_plcmodes_cfg_input req = {.req_type = 0 };
> +	struct hwrm_vnic_plcmodes_cfg_output *resp = bp->hwrm_cmd_resp_addr;
> +	uint16_t size;
> +
> +	HWRM_PREP(req, VNIC_PLCMODES_CFG, -1, resp);
> +
> +	req.flags = rte_cpu_to_le_32(
> +//			HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_REGULAR_PLACEMENT |
> +			HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_JUMBO_PLACEMENT);
> +//			HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV4 | //TODO
> +//			HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV6);

Hi Ajit,

Would you mind if I remove these commented code, in this patch and other
patches, while applying?

Of course it would be better if you send the new version of the patch to
fix them, but I believe I can do this faster. Just let me know please.

Thanks,
ferruh

> +	req.enables = rte_cpu_to_le_32(
> +		HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_JUMBO_THRESH_VALID);
> +//		HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_THRESHOLD_VALID);
> +
> +	size = rte_pktmbuf_data_room_size(bp->rx_queues[0]->mb_pool);
> +	size -= RTE_PKTMBUF_HEADROOM;
> +
> +	req.jumbo_thresh = rte_cpu_to_le_16(size);
> +//	req.hds_threshold = rte_cpu_to_le_16(size);
> +	req.vnic_id = rte_cpu_to_le_32(vnic->fw_vnic_id);
> +
> +	rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
> +
> +	HWRM_CHECK_RESULT;
> +
> +	return rc;
> +}

<...>