* [PATCH] net/intel: fix wrap-around check in simple Tx scalar path
@ 2026-02-26 15:36 Bruce Richardson
2026-02-26 16:08 ` Burakov, Anatoly
2026-02-26 17:44 ` Medvedkin, Vladimir
0 siblings, 2 replies; 4+ messages in thread
From: Bruce Richardson @ 2026-02-26 15:36 UTC (permalink / raw)
To: dev; +Cc: Bruce Richardson, Vladimir Medvedkin
There was an error condition when the burst of packets being transmitted
ended exactly on the last descriptor of the ring. In that instance
alone, we ended up writing an invalid tx_tail value to the hardware, of
ring_size rather than of zero. Add an explicit check for this case to
the simple Tx path code.
Fixes: 9bacf6a81b92 ("net/intel: align scalar simple Tx path with vector logic")
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/intel/common/tx_scalar.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/intel/common/tx_scalar.h b/drivers/net/intel/common/tx_scalar.h
index 4475995180..9fcd2e4733 100644
--- a/drivers/net/intel/common/tx_scalar.h
+++ b/drivers/net/intel/common/tx_scalar.h
@@ -145,6 +145,8 @@ ci_xmit_burst_simple(struct ci_tx_queue *txq,
if (txq->tx_next_rs >= txq->nb_tx_desc)
txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
}
+ if (tx_id == txq->nb_tx_desc)
+ tx_id = 0;
txq->tx_tail = tx_id;
--
2.51.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] net/intel: fix wrap-around check in simple Tx scalar path
2026-02-26 15:36 [PATCH] net/intel: fix wrap-around check in simple Tx scalar path Bruce Richardson
@ 2026-02-26 16:08 ` Burakov, Anatoly
2026-03-02 10:20 ` Bruce Richardson
2026-02-26 17:44 ` Medvedkin, Vladimir
1 sibling, 1 reply; 4+ messages in thread
From: Burakov, Anatoly @ 2026-02-26 16:08 UTC (permalink / raw)
To: Bruce Richardson, dev; +Cc: Vladimir Medvedkin
On 2/26/2026 4:36 PM, Bruce Richardson wrote:
> There was an error condition when the burst of packets being transmitted
> ended exactly on the last descriptor of the ring. In that instance
> alone, we ended up writing an invalid tx_tail value to the hardware, of
> ring_size rather than of zero. Add an explicit check for this case to
> the simple Tx path code.
>
> Fixes: 9bacf6a81b92 ("net/intel: align scalar simple Tx path with vector logic")
>
> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> ---
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
--
Thanks,
Anatoly
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] net/intel: fix wrap-around check in simple Tx scalar path
2026-02-26 15:36 [PATCH] net/intel: fix wrap-around check in simple Tx scalar path Bruce Richardson
2026-02-26 16:08 ` Burakov, Anatoly
@ 2026-02-26 17:44 ` Medvedkin, Vladimir
1 sibling, 0 replies; 4+ messages in thread
From: Medvedkin, Vladimir @ 2026-02-26 17:44 UTC (permalink / raw)
To: Bruce Richardson, dev
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
On 2/26/2026 3:36 PM, Bruce Richardson wrote:
> There was an error condition when the burst of packets being transmitted
> ended exactly on the last descriptor of the ring. In that instance
> alone, we ended up writing an invalid tx_tail value to the hardware, of
> ring_size rather than of zero. Add an explicit check for this case to
> the simple Tx path code.
>
> Fixes: 9bacf6a81b92 ("net/intel: align scalar simple Tx path with vector logic")
>
> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> ---
> drivers/net/intel/common/tx_scalar.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/net/intel/common/tx_scalar.h b/drivers/net/intel/common/tx_scalar.h
> index 4475995180..9fcd2e4733 100644
> --- a/drivers/net/intel/common/tx_scalar.h
> +++ b/drivers/net/intel/common/tx_scalar.h
> @@ -145,6 +145,8 @@ ci_xmit_burst_simple(struct ci_tx_queue *txq,
> if (txq->tx_next_rs >= txq->nb_tx_desc)
> txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
> }
> + if (tx_id == txq->nb_tx_desc)
> + tx_id = 0;
>
> txq->tx_tail = tx_id;
>
--
Regards,
Vladimir
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] net/intel: fix wrap-around check in simple Tx scalar path
2026-02-26 16:08 ` Burakov, Anatoly
@ 2026-03-02 10:20 ` Bruce Richardson
0 siblings, 0 replies; 4+ messages in thread
From: Bruce Richardson @ 2026-03-02 10:20 UTC (permalink / raw)
To: Burakov, Anatoly; +Cc: dev, Vladimir Medvedkin
On Thu, Feb 26, 2026 at 05:08:01PM +0100, Burakov, Anatoly wrote:
> On 2/26/2026 4:36 PM, Bruce Richardson wrote:
> > There was an error condition when the burst of packets being transmitted
> > ended exactly on the last descriptor of the ring. In that instance
> > alone, we ended up writing an invalid tx_tail value to the hardware, of
> > ring_size rather than of zero. Add an explicit check for this case to
> > the simple Tx path code.
> >
> > Fixes: 9bacf6a81b92 ("net/intel: align scalar simple Tx path with vector logic")
> >
> > Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> > ---
>
> Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
>
Applied to next-net-intel.
/Bruce
^ permalink raw reply [flat|nested] 4+ messages in thread
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2026-02-26 15:36 [PATCH] net/intel: fix wrap-around check in simple Tx scalar path Bruce Richardson
2026-02-26 16:08 ` Burakov, Anatoly
2026-03-02 10:20 ` Bruce Richardson
2026-02-26 17:44 ` Medvedkin, Vladimir
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