From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Subject: Re: [PATCH v8 2/4] ethdev: Fill speed capability bitmaps in the PMDs Date: Tue, 16 Feb 2016 23:49:09 +0100 Message-ID: References: <1454028127-10401-1-git-send-email-marcdevel@gmail.com> <1455488259-1000-1-git-send-email-marcdevel@gmail.com> <1455488259-1000-3-git-send-email-marcdevel@gmail.com> <20160215144310.GA19031@scalar.blr.asicdesigners.com> <20160216152544.GA22847@autoinstall.dev.6wind.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Cc: dev@dpdk.org, Nirranjan Kirubaharan , Kumar Sanghvi To: =?UTF-8?Q?N=C3=A9lio_Laranjeiro?= Return-path: Received: from mail-wm0-f50.google.com (mail-wm0-f50.google.com [74.125.82.50]) by dpdk.org (Postfix) with ESMTP id 7F7E6CE7 for ; Tue, 16 Feb 2016 23:49:29 +0100 (CET) Received: by mail-wm0-f50.google.com with SMTP id g62so131966627wme.1 for ; Tue, 16 Feb 2016 14:49:29 -0800 (PST) In-Reply-To: <20160216152544.GA22847@autoinstall.dev.6wind.com> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 16 February 2016 at 16:25, N=C3=A9lio Laranjeiro wrote: > Hi Marc, > > On Mon, Feb 15, 2016 at 06:14:42PM +0100, Marc wrote: > > Rahul, Neilo, Jing D, et al > > > > On 15 February 2016 at 15:43, Rahul Lakkireddy < > rahul.lakkireddy@chelsio.com > > > wrote: > > > > > Hi Marc, > > > > > > On Sunday, February 02/14/16, 2016 at 23:17:37 +0100, Marc Sune wrote= : > > > > Added speed capabilities to all pmds supporting physical NICs: > > > > > > > > * e1000 > > > > * ixgbe > > > > * i40 > > > > * bnx2x > > > > * cxgbe > > > > * mlx4 > > > > * mlx5 > > > > * nfp > > > > * fm10k > > > > > > > > Signed-off-by: Marc Sune > > > > --- > > > > drivers/net/bnx2x/bnx2x_ethdev.c | 1 + > > > > drivers/net/cxgbe/cxgbe_ethdev.c | 1 + > > > > drivers/net/e1000/em_ethdev.c | 6 ++++++ > > > > drivers/net/e1000/igb_ethdev.c | 6 ++++++ > > > > drivers/net/fm10k/fm10k_ethdev.c | 4 ++++ > > > > drivers/net/i40e/i40e_ethdev.c | 9 +++++++++ > > > > drivers/net/ixgbe/ixgbe_ethdev.c | 10 ++++++++++ > > > > drivers/net/mlx4/mlx4.c | 4 ++++ > > > > drivers/net/mlx5/mlx5_ethdev.c | 5 +++++ > > > > drivers/net/nfp/nfp_net.c | 2 ++ > > > > 10 files changed, 48 insertions(+) > > > > > > > > > > [...] > > > > > > > diff --git a/drivers/net/cxgbe/cxgbe_ethdev.c > > > b/drivers/net/cxgbe/cxgbe_ethdev.c > > > > index 97ef152..203e119 100644 > > > > --- a/drivers/net/cxgbe/cxgbe_ethdev.c > > > > +++ b/drivers/net/cxgbe/cxgbe_ethdev.c > > > > @@ -171,6 +171,7 @@ static void cxgbe_dev_info_get(struct rte_eth_d= ev > > > *eth_dev, > > > > > > > > device_info->rx_desc_lim =3D cxgbe_desc_lim; > > > > device_info->tx_desc_lim =3D cxgbe_desc_lim; > > > > + device_info->speed_capa =3D ETH_SPEED_CAP_10G | > ETH_SPEED_CAP_40G; > > > > } > > > > > > > > > > Not all Chelsio NICs support _both_ 10G and 40G speed capabilities on= a > > > single card. You can query pi->link_cfg.supported to get the support= ed > > > speeds. Check out print_port_info() in cxgbe_main.c to help you fill > > > in your speed capabilities for Chelsio NICs. > > > > > > > This patch series has been long delayed, and I've been requested to mer= ge > > it for next release if possible. Most of the feedback has been coming > late > > (not for cxgbe, which is introduced in this new v8, but it did for most > of > > the rest of drivers). > > > > My proposal is simply to add in this patch series ALL possible speeds f= or > > that driver. Other patches can be later submitted to adjust speeds > > according to specific device model. > > I agree with this. I was asking in order to understand what your were > expecting from this API, for me it is clear. > > You should just maintain the current situation i.e. > rte_eth_link.link_speed. This is already what your patches do. > > For the link speed capability (aka device_info->speed_capa), you should > add a new line "speed capability" in the doc/guides/nics/overview.rst. > Those who think it is useful will implement it in their PMD. > Noted for v9. marc > > Regards, > > -- > N=C3=A9lio Laranjeiro > 6WIND >