Re: [PATCH v3 1/6] net/iavf: increase max ring descriptors to hardware limit

[Bruce Richardson <bruce.richardson@intel.com>]

On Tue, Jun 30, 2026 at 08:06:51AM -0400, Dawid Wesierski wrote:
> From: Marek Kasiewicz <marek.kasiewicz@intel.com>
> 
> The Intel E810 hardware supports up to 8160 (8K - 32) descriptors per
> TX/RX ring, but IAVF_MAX_RING_DESC caps it at 4096. Applications that
> need deep descriptor rings for hardware rate-limited pacing (e.g.,
> ST2110 video with thousands of packets per frame) cannot queue enough
> packets before the pacing epoch begins.
> 
> Increase IAVF_MAX_RING_DESC to the hardware maximum of 8160 to allow
> full utilization of the ring depth on E810 VFs.
> 
> Signed-off-by: Marek Kasiewicz <marek.kasiewicz@intel.com>
> Signed-off-by: Dawid Wesierski <dawid.wesierski@intel.com>

Acked-by: Bruce Richardson <bruce.richardson@intel.com>

> ---
>  .mailmap                           | 2 ++
>  drivers/net/intel/iavf/iavf_rxtx.h | 2 +-
>  2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/.mailmap b/.mailmap
> index 4001e5fb0e..d7b175de2a 100644
> --- a/.mailmap
> +++ b/.mailmap
> @@ -366,6 +366,7 @@ David Zeng <zengxhsh@cn.ibm.com>
>  Davide Caratti <dcaratti@redhat.com>
>  Dawid Gorecki <dgr@semihalf.com>
>  Dawid Jurczak <dawid_jurek@vp.pl>
> +Dawid Wesierski <dawid.wesierski@intel.com>
>  Dawid Zielinski <dawid.zielinski@intel.com>
>  Dawid Łukwiński <dawid.lukwinski@intel.com>
>  Daxue Gao <daxuex.gao@intel.com>
> @@ -1014,6 +1015,7 @@ Marcin Wilk <marcin.wilk@caviumnetworks.com>
>  Marcin Wojtas <mw@semihalf.com>
>  Marcin Zapolski <marcinx.a.zapolski@intel.com>
>  Marco Varlese <mvarlese@suse.de>
> +Marek Kasiewicz <marek.kasiewicz@intel.com>
>  Marek Mical <marekx.mical@intel.com>
>  Marek Zalfresso-jundzillo <marekx.zalfresso-jundzillo@intel.com>
>  Maria Lingemark <maria.lingemark@ericsson.com>
> diff --git a/drivers/net/intel/iavf/iavf_rxtx.h b/drivers/net/intel/iavf/iavf_rxtx.h
> index 8449236d4d..22ea415f44 100644
> --- a/drivers/net/intel/iavf/iavf_rxtx.h
> +++ b/drivers/net/intel/iavf/iavf_rxtx.h
> @@ -16,7 +16,7 @@
>  /* In QLEN must be whole number of 32 descriptors. */
>  #define IAVF_ALIGN_RING_DESC      32
>  #define IAVF_MIN_RING_DESC        64
> -#define IAVF_MAX_RING_DESC        4096
> +#define IAVF_MAX_RING_DESC        (8192 - 32)
>  #define IAVF_DMA_MEM_ALIGN        4096
>  /* Base address of the HW descriptor ring should be 128B aligned. */
>  #define IAVF_RING_BASE_ALIGN      128
> -- 
> 2.47.3
> 
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