From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gowrishankar Subject: [PATCH] eal/ppc: fix rte_smp_mb for a compilation error with else clause Date: Tue, 27 Feb 2018 20:43:58 +0530 Message-ID: Cc: Chao Zhu , stable@dpdk.org, thomas@monjalon.net, Gowrishankar Muthukrishnan To: dev@dpdk.org Return-path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by dpdk.org (Postfix) with ESMTP id 734654C81 for ; Tue, 27 Feb 2018 16:14:05 +0100 (CET) Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w1RF5Pcf070168 for ; Tue, 27 Feb 2018 10:14:04 -0500 Received: from e06smtp15.uk.ibm.com (e06smtp15.uk.ibm.com [195.75.94.111]) by mx0b-001b2d01.pphosted.com with ESMTP id 2gd97da2ds-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 27 Feb 2018 10:14:04 -0500 Received: from localhost by e06smtp15.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 27 Feb 2018 15:14:03 -0000 List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Gowrishankar Muthukrishnan This patch fixes the compilation problem with rte_smp_mb, when there is else clause following it, as in test_barrier.c. Fixes: 05c3fd7110 ("eal/ppc: atomic operations for IBM Power") Cc: stable@dpdk.org Signed-off-by: Gowrishankar Muthukrishnan --- lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h index 39fce7b..1821774 100644 --- a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h @@ -55,7 +55,7 @@ * Guarantees that the LOAD and STORE operations generated before the * barrier occur before the LOAD and STORE operations generated after. */ -#define rte_mb() {asm volatile("sync" : : : "memory"); } +#define rte_mb() asm volatile("sync" : : : "memory") /** * Write memory barrier. -- 1.9.1