From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Burakov, Anatoly" Subject: Re: [PATCH] mem: fix DMA mask width sanity check Date: Wed, 7 Nov 2018 10:14:30 +0000 Message-ID: References: <20181107094456.23123-1-alejandro.lucero@netronome.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit To: Alejandro Lucero , dev@dpdk.org Return-path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id 30031201 for ; Wed, 7 Nov 2018 11:14:33 +0100 (CET) In-Reply-To: <20181107094456.23123-1-alejandro.lucero@netronome.com> Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 07-Nov-18 9:44 AM, Alejandro Lucero wrote: > Current code has different max DMA mask width values for 32 and 64 > bits systems. IOMMU hardware could report a higher supported width > than current MAX_DMA_MASK_BITS when RTE_ARCH_64 is not defined. This > is actually true with a 32 bits kernel running in a 64 bits server > with IOMMU hardware. This could also be a problem with embedded systems > using an IOMMU designed for 64 bits in a 32 bits system. > > This patch leaves a single max DMA mask width which will make sure the > mask width is within the range for 64 bits variables used for DMA mask. > This also will avoid wrong values because any value higher than > 64 bits is likely wrong. > > Signed-off-by: Alejandro Lucero > --- Acked-by: Anatoly Burakov -- Thanks, Anatoly