* Re: [PATCH v2 1/5] ethdev: add firmware version get
From: Yang, Qiming @ 2016-12-12 1:28 UTC (permalink / raw)
To: Yigit, Ferruh, dev@dpdk.org; +Cc: Thomas Monjalon, Horton, Remy
In-Reply-To: <4177103b-21af-403c-ad3f-6ab1fac94903@intel.com>
Hi, Yigit
Yes, we had planned to add fw_version in rte_eth_dev_info_get(). But Remy think we should better to implement this feature through a way don't break the original ABI. So I change the implement.
-----Original Message-----
From: Yigit, Ferruh
Sent: Thursday, December 8, 2016 7:07 PM
To: Yang, Qiming <qiming.yang@intel.com>; dev@dpdk.org
Cc: Thomas Monjalon <thomas.monjalon@6wind.com>
Subject: Re: [dpdk-dev] [PATCH v2 1/5] ethdev: add firmware version get
Hi Qiming,
On 12/6/2016 7:16 AM, Qiming Yang wrote:
> This patch adds a new API 'rte_eth_dev_fwver_get' for fetching
> firmware version by a given device.
>
> Signed-off-by: Qiming Yang <qiming.yang@intel.com>
<...>
> @@ -1444,6 +1448,7 @@ struct eth_dev_ops {
> /**< Get names of extended statistics. */
> eth_queue_stats_mapping_set_t queue_stats_mapping_set;
> /**< Configure per queue stat counter mapping. */
> + eth_fw_version_get_t fw_version_get; /**< Get firmware version. */
Hi Qiming,
Not sure if I am missing something but this change is for following [1] deprecation notice, right?
If so, notice suggest updating rte_eth_dev_info_get() to include fw_version, but this patch adds a new eth_dev_ops.
Is it agreed to add a new eth_dev_ops for this?
[1]
* In 17.02 ABI change is planned: the ``rte_eth_dev_info`` structure
will be extended with a new member ``fw_version`` in order to store
the NIC firmware version.
> eth_dev_infos_get_t dev_infos_get; /**< Get device info. */
> eth_dev_supported_ptypes_get_t dev_supported_ptypes_get;
> /**< Get packet types supported and identified by device*/
<...>
^ permalink raw reply
* Re: dpdk16.07 and virtio "Cannot mmap IO port resource"
From: Gopakumar Choorakkot Edakkunni @ 2016-12-11 18:52 UTC (permalink / raw)
To: dev, Olivier Matz
In-Reply-To: <CABK1yFAXs6HC9hOy4RF0FLwvOhgeh4EQwp5NRTevwmJOys-qmQ@mail.gmail.com>
nevermind .. I saw the hew ARCH_X86 flag which I dint realise I have to add
in my config file when I moved from dpdk2.0
On Sun, Dec 11, 2016 at 12:29 AM, Gopakumar Choorakkot Edakkunni <
gopakumar.c.e@gmail.com> wrote:
> Somewhere I read that the "offset" parameter for sysfs mmap() needs to be
> the start address of the resource, so I tried the below diff, and mmap
> still fails .. Still scratching my head
>
> diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_uio.c
> b/lib/librte_eal/linuxapp/eal/eal_pci_uio.c
> index 1786b75..e882940 100644
> --- a/lib/librte_eal/linuxapp/eal/eal_pci_uio.c
> +++ b/lib/librte_eal/linuxapp/eal/eal_pci_uio.c
> @@ -462,8 +462,8 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
> strerror(errno));
> goto error;
> }
> - addr = mmap(NULL, end_addr + 1, PROT_READ | PROT_WRITE,
> - MAP_SHARED, fd, 0);
> + addr = mmap(NULL, (end_addr-phys_addr) + 1, PROT_READ | PROT_WRITE,
> + MAP_SHARED, fd, phys_addr);
> close(fd);
> if (addr == MAP_FAILED) {
> RTE_LOG(ERR, EAL, "Cannot mmap IO port resource: %s\n",
> @@ -473,7 +473,7 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
>
> /* strangely, the base address is mmap addr + phys_addr */
> p->base = (uintptr_t)addr + phys_addr;
> - p->len = end_addr + 1;
> + p->len = (end_addr-phys_addr) + 1;
> RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%"PRIx64"\n",
> p->base);
> fclose(f);
>
> On Sat, Dec 10, 2016 at 3:21 PM, Gopakumar Choorakkot Edakkunni <
> gopakumar.c.e@gmail.com> wrote:
>
>> Hi Oliver,
>>
>> Looking at the kernel code pci_mmap_resource()--->pci_mmap_fits(), it
>> looks like pci_mmap_fits() expects that the "number of pages" requested to
>> map is no larger than the actual size of the pci resource. But in
>> pci_uio_ioport_map() what is passed as the requested size is the end_addr
>> of the resource, which in my case is 0xc09f, but the size of the resource
>> itself is 0x20 and hence kernel expects one page - but 0xc09f+1
>> (end_addr+1) gets translated to 13 pages ! And I guess that leads to the
>> mmap to fail .. Thoughts on this ?
>>
>> Rgds,
>> Gopa.
>>
>>
>> On Fri, Dec 9, 2016 at 8:30 PM, Gopakumar Choorakkot Edakkunni <
>> gopakumar.c.e@gmail.com> wrote:
>>
>>> I tried to load up dpdk (bound to uio_pci_generic, tried igb_uio also!)
>>> on a virtio interface. Dpdk exits with the "Cannot mmap IO port resource"
>>> complaint - the call chain is legacy_virtio_resource_init()-->pci_uio_ioport_map().
>>>
>>>
>>> If anyone can give any clues/pointers as to what might be wrong, that
>>> can greatly help in getting me on the right track fast !
>>>
>>> ---
>>> EAL: probe driver: 1af4:1000 rte_virtio_pmd
>>> EAL: PCI device 0000:00:05.0 on NUMA socket 0
>>> EAL: probe driver: 1af4:1000 r[ 330.753458] ------------[ cut here
>>> ]------------
>>> rte_virtio_pmd
>>> [ 330.754430] WARNING: CPU: 0 PID: 8063 at drivers/pci/pci-sysfs.c:984
>>> pci_mmap_resource.isra.14+0x113/0x1b0()
>>> [ 330.756083] process "dpdk_master" tried to map 0x0000d000 bytes at
>>> page 0x00000000 on 0000:00:05.0 BAR 0 (start 0x c080, size
>>> 0x 20)
>>> [ 330.758272] Modules linked in: rte_kni igb_uio pppoe ppp_async
>>> iptable_nat cdc_mbim sierra_net rndis_host qmi_wwan qcserial pppox
>>> ppp_generic option nf_nat_pptp nf_nat_ipv4 nf_nat_amanda nf_conntrack_pptp
>>> nf_conntrack_ipv4 nf_conntrack_amanda ipt_MASQUERADE huawei_cdc_ncm
>>> cdc_subset cdc_ncm cdc_ether cdc_eem ax88179_178a asix xt_u32 xt_time
>>> xt_tcpmss xt_string xt_statistic xt_state xt_socket xt_recent xt_quota
>>> xt_pkttype xt_physdev xt_owner xt_nat xt_multiport xt_mark xt_mac xt_limit
>>> xt_length xt_iprange xt_id xt_hl xt_helper xt_hashlimit xt_esp xt_ecn
>>> xt_dscp xt_conntrack xt_connmark xt_connlimit xt_connbytes xt_comment
>>> xt_addrtype xt_TPROXY xt_TEE xt_TCPMSS xt_REDIRECT xt_NETMAP xt_LOG xt_LED
>>> xt_HL xt_DSCP xt_CT xt_CLASSIFY usbnet usb_wwan ts_kmp ts_fsm ts_bm slhc
>>> sierra pl2303 nfnetlink_queue nfnetlink_log nf_nat_tftp nf_nat_snmp_basic
>>> nf_nat_sip nf_nat_proto_gre nf_nat_irc nf_nat_h323 nf_nat_ftp nf_nat
>>> nf_defrag_ipv4 nf_conntrack_tftp nf_conntrack_snmp nf_conntrack_sip
>>> nf_conntrack_proto_gre nf_conntrack_netlink nf_conntrack_irc
>>> nf_conntrack_h323 nf_conntrack_ftp nf_conntrack_broadcast
>>> lib80211_crypt_wep lib80211_crypt_tkip lib80211_crypt_ccmp lib80211
>>> iptable_raw iptable_mangle iptable_filter ipt_ah ipt_ULOG ipt_REJECT
>>> ipt_ECN hso ftdi_sio crc8 crc7 crc_itu_t crc_ccitt cp210x cordic
>>> compat_xtables cdc_wdm cdc_acm arptable_filter arpt_mangle arp_tables
>>> sch_teql sch_tbf sch_sfq sch_red sch_prio sch_netem sch_htb sch_gred
>>> sch_dsmark sch_codel em_text em_nbyte em_meta em_cmp cls_basic act_police
>>> act_ipt act_connmark act_skbedit act_mirred em_u32 cls_u32 cls_tcindex
>>> cls_flow cls_route cls_fw sch_hfsc sch_ingress evdev xt_NFQUEUE xt_set
>>> ip_set_list_set ip_set_hash_netport ip_set_hash_netiface ip_set_hash_net
>>> ip_set_hash_ipportnet ip_set_hash_ipportip ip_set_hash_ipport
>>> ip_set_hash_ip ip_set_bitmap_port ip_set_bitmap_ipmac ip_set_bitmap_ip
>>> ip_set nfnetlink sr_mod cdrom ip6t_REJECT ip6table_raw ip6table_mangle
>>> ip6table_filter ip6_tables nf_conntrack_ipv6 nf_conntrack nf_defrag_ipv6
>>> ifb ipip ip6_tunnel tunnel6 tunnel4 ip_tunnel tun mdio loop vfat fat isofs
>>> nls_utf8 nls_iso8859_15 nls_iso8859_1 nls_cp850 nls_cp437 rfkill virtio_rng
>>> sha512_generic sha256_generic sha1_generic md5 arc4 ath10k_pci ath10k_core
>>> ath9k ath9k_common ath9k_hw ath mac80211 cfg80211 compat pcnet32 e1000
>>> virtio_net ohci_hcd ixgbevf ixgbe hwmon igbvf igb dsa_core mii [last
>>> unloaded: igb_uio]
>>> [ 330.805110] CPU: 0 PID: 8063 Comm: dpdk_master Tainted: G W
>>> 3.14.67 #1
>>> [ 330.806104] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996),
>>> BIOS Bochs 01/01/2011
>>> [ 330.806104] 0000000000000286 0000000000000000 ffffffff814e167c
>>> 0000000000000006
>>> [ 330.806104] ffff88008b573cd8 ffffffff81259d73 ffffffff81061b72
>>> ffff88013b24fae0
>>> [ 330.806104] ffff88013b24f800 0000000000000000 ffff88013a498000
>>> ffff88013b24f8a8
>>> [ 330.806104] Call Trace:
>>> [ 330.806104] [<ffffffff814e167c>] ? dump_stack+0x5e/0x7a
>>> [ 330.806104] [<ffffffff81259d73>] ? pci_mmap_resource.isra.14+0x11
>>> 3/0x1b0
>>> [ 330.806104] [<ffffffff81061b72>] ? warn_slowpath_common+0x82/0xb0
>>> [ 330.806104] [<ffffffff81061c55>] ? warn_slowpath_fmt+0x45/0x50
>>> [ 330.806104] [<ffffffff81120321>] ? do_last.isra.58+0xac1/0xc00
>>> [ 330.806104] [<ffffffff81259d73>] ? pci_mmap_resource.isra.14+0x11
>>> 3/0x1b0
>>> [ 330.806104] [<ffffffff8116da79>] ? kernfs_fop_mmap+0x69/0x100
>>> [ 330.806104] [<ffffffff810f4018>] ? mmap_region+0x2e8/0x560
>>> [ 330.806104] [<ffffffff810f45a8>] ? do_mmap_pgoff+0x318/0x3b0
>>> [ 330.806104] [<ffffffff810e1724>] ? vm_mmap_pgoff+0x74/0xc0
>>> [ 330.806104] [<ffffffff810f2d1a>] ? SyS_mmap_pgoff+0x18a/0x1e0
>>> [ 330.806104] [<ffffffff814e7759>] ? system_call_fastpath+0x16/0x1b
>>> [ 330.823897] ---[ end trace c6106b67c768d501 ]---
>>> EAL: Cannot mmap IO port resource: Invalid argument
>>> EAL: Error - exiting with code: 1
>>> Cause: Requested device 0000:00:05.0 cannot be used
>>>
>>
>>
>
^ permalink raw reply
* Re: [PATCH 1/4] eal/common: introduce rte_memset on IA platform
From: Yang, Zhiyong @ 2016-12-11 12:32 UTC (permalink / raw)
To: Ananyev, Konstantin, Thomas Monjalon
Cc: dev@dpdk.org, yuanhan.liu@linux.intel.com, Richardson, Bruce,
De Lara Guarch, Pablo
In-Reply-To: <2601191342CEEE43887BDE71AB9772583F0E568B@irsmsx105.ger.corp.intel.com>
Hi, Konstantin, Bruce:
> -----Original Message-----
> From: Ananyev, Konstantin
> Sent: Thursday, December 8, 2016 6:31 PM
> To: Yang, Zhiyong <zhiyong.yang@intel.com>; Thomas Monjalon
> <thomas.monjalon@6wind.com>
> Cc: dev@dpdk.org; yuanhan.liu@linux.intel.com; Richardson, Bruce
> <bruce.richardson@intel.com>; De Lara Guarch, Pablo
> <pablo.de.lara.guarch@intel.com>
> Subject: RE: [dpdk-dev] [PATCH 1/4] eal/common: introduce rte_memset on
> IA platform
>
>
>
> > -----Original Message-----
> > From: Yang, Zhiyong
> > Sent: Thursday, December 8, 2016 9:53 AM
> > To: Ananyev, Konstantin <konstantin.ananyev@intel.com>; Thomas
> > Monjalon <thomas.monjalon@6wind.com>
> > Cc: dev@dpdk.org; yuanhan.liu@linux.intel.com; Richardson, Bruce
> > <bruce.richardson@intel.com>; De Lara Guarch, Pablo
> > <pablo.de.lara.guarch@intel.com>
> > Subject: RE: [dpdk-dev] [PATCH 1/4] eal/common: introduce rte_memset
> > on IA platform
> >
> > Hi， Konstantin:
> >
> > > -----Original Message-----
> > > From: Ananyev, Konstantin
> > > Sent: Thursday, December 8, 2016 5:26 PM
> > > To: Yang, Zhiyong <zhiyong.yang@intel.com>; Thomas Monjalon
> > > <thomas.monjalon@6wind.com>
> > > Cc: dev@dpdk.org; yuanhan.liu@linux.intel.com; Richardson, Bruce
> > > <bruce.richardson@intel.com>; De Lara Guarch, Pablo
> > > <pablo.de.lara.guarch@intel.com>
> > > Subject: RE: [dpdk-dev] [PATCH 1/4] eal/common: introduce rte_memset
> > > on IA platform
> > >
> > >
> > > Hi Zhiyong,
> > >
> > > >
> > > > HI, Thomas:
> > > > Sorry for late reply. I have been being always considering your
> > > suggestion.
> > > >
> > > > > -----Original Message-----
> > > > > From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com]
> > > > > Sent: Friday, December 2, 2016 6:25 PM
> > > > > To: Yang, Zhiyong <zhiyong.yang@intel.com>
> > > > > Cc: dev@dpdk.org; yuanhan.liu@linux.intel.com; Richardson, Bruce
> > > > > <bruce.richardson@intel.com>; Ananyev, Konstantin
> > > > > <konstantin.ananyev@intel.com>; De Lara Guarch, Pablo
> > > > > <pablo.de.lara.guarch@intel.com>
> > > > > Subject: Re: [dpdk-dev] [PATCH 1/4] eal/common: introduce
> > > rte_memset
> > > > > on IA platform
> > > > >
> > > > > 2016-12-05 16:26, Zhiyong Yang:
> > > > > > +#ifndef _RTE_MEMSET_X86_64_H_
> > > > >
> > > > > Is this implementation specific to 64-bit?
> > > > >
> > > >
> > > > Yes.
> > > >
> > > > > > +
> > > > > > +#define rte_memset memset
> > > > > > +
> > > > > > +#else
> > > > > > +
> > > > > > +static void *
> > > > > > +rte_memset(void *dst, int a, size_t n);
> > > > > > +
> > > > > > +#endif
> > > > >
> > > > > If I understand well, rte_memset (as rte_memcpy) is using the
> > > > > most recent instructions available (and enabled) when compiling.
> > > > > It is not adapting the instructions to the run-time CPU.
> > > > > There is no need to downgrade at run-time the instruction set as
> > > > > it is obviously not a supported case, but it would be nice to be
> > > > > able to upgrade a "default compilation" at run-time as it is done in
> rte_acl.
> > > > > I explain this case more clearly for reference:
> > > > >
> > > > > We can have AVX512 supported in the compiler but disable it when
> > > > > compiling
> > > > > (CONFIG_RTE_MACHINE=snb) in order to build a binary running
> > > > > almost everywhere.
> > > > > When running this binary on a CPU having AVX512 support, it will
> > > > > not benefit of the AVX512 improvement.
> > > > > Though, we can compile an AVX512 version of some functions and
> > > > > use them only if the running CPU is capable.
> > > > > This kind of miracle can be achieved in two ways:
> > > > >
> > > > > 1/ For generic C code compiled with a recent GCC, a function can
> > > > > be built for several CPUs thanks to the attribute target_clones.
> > > > >
> > > > > 2/ For manually optimized functions using CPU-specific
> > > > > intrinsics or asm, it is possible to build them with non-default
> > > > > flags thanks to the
> > > attribute target.
> > > > >
> > > > > 3/ For manually optimized files using CPU-specific intrinsics or
> > > > > asm, we use specifics flags in the makefile.
> > > > >
> > > > > The function clone in case 1/ is dynamically chosen at run-time
> > > > > through ifunc resolver.
> > > > > The specific functions in cases 2/ and 3/ must chosen at
> > > > > run-time by initializing a function pointer thanks to
> rte_cpu_get_flag_enabled().
> > > > >
> > > > > Note that rte_hash and software crypto PMDs have a run-time
> > > > > check with
> > > > > rte_cpu_get_flag_enabled() but do not override CFLAGS in the
> Makefile.
> > > > > Next step for these libraries?
> > > > >
> > > > > Back to rte_memset, I think you should try the solution 2/.
> > > >
> > > > I have read the ACL code, if I understand well , for complex algo
> > > > implementation, it is good idea, but Choosing functions at run
> > > > time will bring some overhead. For frequently called function
> > > > Which consumes small cycles, the overhead maybe is more than the
> > > > gains
> > > optimizations brings For example, for most applications in dpdk,
> > > memset only set N = 10 or 12bytes. It consumes fewer cycles.
> > >
> > > But then what the point to have an rte_memset() using vector
> > > instructions at all?
> > > From what you are saying the most common case is even less then SSE
> > > register size.
> > > Konstantin
> >
> > For most cases, memset is used such as memset(address, 0,
> > sizeof(struct xxx));
>
> Ok then I suppose for such cases you don't need any special function and
> memset() would still be the best choice, right?
>
In fact, the bad performance drop has been found on IVB, Please reference to
http://dpdk.org/ml/archives/dev/2016-October/048628.html
The following code cause the perf issue
memset((void *)(uintptr_t)&(virtio_hdr->hdr),0 , dev->vhost_hlen);
vhost_hlen is 10 or 12 bytes, So, glibc memset is not used here.
> > The use case here is small by accident, I only give an example here.
> > but rte_memset is introduced to need consider generic case.
>
> We can have rte_memset_huge() or so instead, and document that it should
> be used for sizes greater than some cutoff point.
> Inside it you can just call a function pointer installed at startup (same as
> rte_acl_classify() does).
> For big sizes, I suppose the price of extra function pointer call would not
> affect performance much.
> For sizes smaller then this cutoff point you still can use either
> rte_memset_scalar() or just normal rte_memset().
> Something like that:
>
> extern void *(*__rte_memset_vector)( (void *s, int c, size_t n);
>
> static inline void*
> rte_memset_huge(void *s, int c, size_t n) {
> return __rte_memset_vector(s, c, n);
> }
>
> static inline void *
> rte_memset(void *s, int c, size_t n)
> {
> If (n < XXX)
> return rte_memset_scalar(s, c, n);
> else
> return rte_memset_huge(s, c, n);
> }
>
> XXX could be either a define, or could also be a variable, so it can be setuped
> at startup, depending on the architecture.
>
> Would that work?
> Konstantin
>
The idea sounds good. It maybe is more feasible for rte_memcpy and rte_memset.
If I understand well , the idea from Bruce is similar, right ?
> > sizeof(struct xxx) is not limited to very small size, such as less than SSE
> register size.
> > I just want to say that the size for the most use case is not very
> > large, So cycles consumed Is not large. It is not suited to choose function at
> run-time since overhead is considered.
> >
> > thanks
> > Zhiyong
^ permalink raw reply
* Re: [PATCH 1/4] eal/common: introduce rte_memset on IA platform
From: Yang, Zhiyong @ 2016-12-11 12:04 UTC (permalink / raw)
To: Thomas Monjalon
Cc: dev@dpdk.org, yuanhan.liu@linux.intel.com, Richardson, Bruce,
Ananyev, Konstantin, De Lara Guarch, Pablo
In-Reply-To: <2141223.ggdlk6O12s@xps13>
Hi, Thomas:
> -----Original Message-----
> From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com]
> Sent: Thursday, December 8, 2016 11:10 PM
> To: Yang, Zhiyong <zhiyong.yang@intel.com>
> Cc: dev@dpdk.org; yuanhan.liu@linux.intel.com; Richardson, Bruce
> <bruce.richardson@intel.com>; Ananyev, Konstantin
> <konstantin.ananyev@intel.com>; De Lara Guarch, Pablo
> <pablo.de.lara.guarch@intel.com>
> Subject: Re: [dpdk-dev] [PATCH 1/4] eal/common: introduce rte_memset on
> IA platform
>
> 2016-12-08 07:41, Yang, Zhiyong:
> > From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com]
> > > 2016-12-05 16:26, Zhiyong Yang:
> > > > +#ifndef _RTE_MEMSET_X86_64_H_
> > >
> > > Is this implementation specific to 64-bit?
> > >
> >
> > Yes.
>
> So should we rename this file?
> rte_memset.h -> rte_memset_64.h
>
> You need also to create a file rte_memset.h for each arch.
Ok
^ permalink raw reply
* Re: dpdk16.07 and virtio "Cannot mmap IO port resource"
From: Gopakumar Choorakkot Edakkunni @ 2016-12-11 8:29 UTC (permalink / raw)
To: dev, Olivier Matz
In-Reply-To: <CABK1yFDSHOh3CRrNMoEZniTrk8JLW3XSpe2dvcuUsOynH2RXRQ@mail.gmail.com>
Somewhere I read that the "offset" parameter for sysfs mmap() needs to be
the start address of the resource, so I tried the below diff, and mmap
still fails .. Still scratching my head
diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_uio.c
b/lib/librte_eal/linuxapp/eal/eal_pci_uio.c
index 1786b75..e882940 100644
--- a/lib/librte_eal/linuxapp/eal/eal_pci_uio.c
+++ b/lib/librte_eal/linuxapp/eal/eal_pci_uio.c
@@ -462,8 +462,8 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
strerror(errno));
goto error;
}
- addr = mmap(NULL, end_addr + 1, PROT_READ | PROT_WRITE,
- MAP_SHARED, fd, 0);
+ addr = mmap(NULL, (end_addr-phys_addr) + 1, PROT_READ | PROT_WRITE,
+ MAP_SHARED, fd, phys_addr);
close(fd);
if (addr == MAP_FAILED) {
RTE_LOG(ERR, EAL, "Cannot mmap IO port resource: %s\n",
@@ -473,7 +473,7 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
/* strangely, the base address is mmap addr + phys_addr */
p->base = (uintptr_t)addr + phys_addr;
- p->len = end_addr + 1;
+ p->len = (end_addr-phys_addr) + 1;
RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%"PRIx64"\n",
p->base);
fclose(f);
On Sat, Dec 10, 2016 at 3:21 PM, Gopakumar Choorakkot Edakkunni <
gopakumar.c.e@gmail.com> wrote:
> Hi Oliver,
>
> Looking at the kernel code pci_mmap_resource()--->pci_mmap_fits(), it
> looks like pci_mmap_fits() expects that the "number of pages" requested to
> map is no larger than the actual size of the pci resource. But in
> pci_uio_ioport_map() what is passed as the requested size is the end_addr
> of the resource, which in my case is 0xc09f, but the size of the resource
> itself is 0x20 and hence kernel expects one page - but 0xc09f+1
> (end_addr+1) gets translated to 13 pages ! And I guess that leads to the
> mmap to fail .. Thoughts on this ?
>
> Rgds,
> Gopa.
>
>
> On Fri, Dec 9, 2016 at 8:30 PM, Gopakumar Choorakkot Edakkunni <
> gopakumar.c.e@gmail.com> wrote:
>
>> I tried to load up dpdk (bound to uio_pci_generic, tried igb_uio also!)
>> on a virtio interface. Dpdk exits with the "Cannot mmap IO port resource"
>> complaint - the call chain is legacy_virtio_resource_init()-->pci_uio_ioport_map().
>>
>>
>> If anyone can give any clues/pointers as to what might be wrong, that can
>> greatly help in getting me on the right track fast !
>>
>> ---
>> EAL: probe driver: 1af4:1000 rte_virtio_pmd
>> EAL: PCI device 0000:00:05.0 on NUMA socket 0
>> EAL: probe driver: 1af4:1000 r[ 330.753458] ------------[ cut here
>> ]------------
>> rte_virtio_pmd
>> [ 330.754430] WARNING: CPU: 0 PID: 8063 at drivers/pci/pci-sysfs.c:984
>> pci_mmap_resource.isra.14+0x113/0x1b0()
>> [ 330.756083] process "dpdk_master" tried to map 0x0000d000 bytes at
>> page 0x00000000 on 0000:00:05.0 BAR 0 (start 0x c080, size
>> 0x 20)
>> [ 330.758272] Modules linked in: rte_kni igb_uio pppoe ppp_async
>> iptable_nat cdc_mbim sierra_net rndis_host qmi_wwan qcserial pppox
>> ppp_generic option nf_nat_pptp nf_nat_ipv4 nf_nat_amanda nf_conntrack_pptp
>> nf_conntrack_ipv4 nf_conntrack_amanda ipt_MASQUERADE huawei_cdc_ncm
>> cdc_subset cdc_ncm cdc_ether cdc_eem ax88179_178a asix xt_u32 xt_time
>> xt_tcpmss xt_string xt_statistic xt_state xt_socket xt_recent xt_quota
>> xt_pkttype xt_physdev xt_owner xt_nat xt_multiport xt_mark xt_mac xt_limit
>> xt_length xt_iprange xt_id xt_hl xt_helper xt_hashlimit xt_esp xt_ecn
>> xt_dscp xt_conntrack xt_connmark xt_connlimit xt_connbytes xt_comment
>> xt_addrtype xt_TPROXY xt_TEE xt_TCPMSS xt_REDIRECT xt_NETMAP xt_LOG xt_LED
>> xt_HL xt_DSCP xt_CT xt_CLASSIFY usbnet usb_wwan ts_kmp ts_fsm ts_bm slhc
>> sierra pl2303 nfnetlink_queue nfnetlink_log nf_nat_tftp nf_nat_snmp_basic
>> nf_nat_sip nf_nat_proto_gre nf_nat_irc nf_nat_h323 nf_nat_ftp nf_nat
>> nf_defrag_ipv4 nf_conntrack_tftp nf_conntrack_snmp nf_conntrack_sip
>> nf_conntrack_proto_gre nf_conntrack_netlink nf_conntrack_irc
>> nf_conntrack_h323 nf_conntrack_ftp nf_conntrack_broadcast
>> lib80211_crypt_wep lib80211_crypt_tkip lib80211_crypt_ccmp lib80211
>> iptable_raw iptable_mangle iptable_filter ipt_ah ipt_ULOG ipt_REJECT
>> ipt_ECN hso ftdi_sio crc8 crc7 crc_itu_t crc_ccitt cp210x cordic
>> compat_xtables cdc_wdm cdc_acm arptable_filter arpt_mangle arp_tables
>> sch_teql sch_tbf sch_sfq sch_red sch_prio sch_netem sch_htb sch_gred
>> sch_dsmark sch_codel em_text em_nbyte em_meta em_cmp cls_basic act_police
>> act_ipt act_connmark act_skbedit act_mirred em_u32 cls_u32 cls_tcindex
>> cls_flow cls_route cls_fw sch_hfsc sch_ingress evdev xt_NFQUEUE xt_set
>> ip_set_list_set ip_set_hash_netport ip_set_hash_netiface ip_set_hash_net
>> ip_set_hash_ipportnet ip_set_hash_ipportip ip_set_hash_ipport
>> ip_set_hash_ip ip_set_bitmap_port ip_set_bitmap_ipmac ip_set_bitmap_ip
>> ip_set nfnetlink sr_mod cdrom ip6t_REJECT ip6table_raw ip6table_mangle
>> ip6table_filter ip6_tables nf_conntrack_ipv6 nf_conntrack nf_defrag_ipv6
>> ifb ipip ip6_tunnel tunnel6 tunnel4 ip_tunnel tun mdio loop vfat fat isofs
>> nls_utf8 nls_iso8859_15 nls_iso8859_1 nls_cp850 nls_cp437 rfkill virtio_rng
>> sha512_generic sha256_generic sha1_generic md5 arc4 ath10k_pci ath10k_core
>> ath9k ath9k_common ath9k_hw ath mac80211 cfg80211 compat pcnet32 e1000
>> virtio_net ohci_hcd ixgbevf ixgbe hwmon igbvf igb dsa_core mii [last
>> unloaded: igb_uio]
>> [ 330.805110] CPU: 0 PID: 8063 Comm: dpdk_master Tainted: G W
>> 3.14.67 #1
>> [ 330.806104] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996),
>> BIOS Bochs 01/01/2011
>> [ 330.806104] 0000000000000286 0000000000000000 ffffffff814e167c
>> 0000000000000006
>> [ 330.806104] ffff88008b573cd8 ffffffff81259d73 ffffffff81061b72
>> ffff88013b24fae0
>> [ 330.806104] ffff88013b24f800 0000000000000000 ffff88013a498000
>> ffff88013b24f8a8
>> [ 330.806104] Call Trace:
>> [ 330.806104] [<ffffffff814e167c>] ? dump_stack+0x5e/0x7a
>> [ 330.806104] [<ffffffff81259d73>] ? pci_mmap_resource.isra.14+0x11
>> 3/0x1b0
>> [ 330.806104] [<ffffffff81061b72>] ? warn_slowpath_common+0x82/0xb0
>> [ 330.806104] [<ffffffff81061c55>] ? warn_slowpath_fmt+0x45/0x50
>> [ 330.806104] [<ffffffff81120321>] ? do_last.isra.58+0xac1/0xc00
>> [ 330.806104] [<ffffffff81259d73>] ? pci_mmap_resource.isra.14+0x11
>> 3/0x1b0
>> [ 330.806104] [<ffffffff8116da79>] ? kernfs_fop_mmap+0x69/0x100
>> [ 330.806104] [<ffffffff810f4018>] ? mmap_region+0x2e8/0x560
>> [ 330.806104] [<ffffffff810f45a8>] ? do_mmap_pgoff+0x318/0x3b0
>> [ 330.806104] [<ffffffff810e1724>] ? vm_mmap_pgoff+0x74/0xc0
>> [ 330.806104] [<ffffffff810f2d1a>] ? SyS_mmap_pgoff+0x18a/0x1e0
>> [ 330.806104] [<ffffffff814e7759>] ? system_call_fastpath+0x16/0x1b
>> [ 330.823897] ---[ end trace c6106b67c768d501 ]---
>> EAL: Cannot mmap IO port resource: Invalid argument
>> EAL: Error - exiting with code: 1
>> Cause: Requested device 0000:00:05.0 cannot be used
>>
>
>
^ permalink raw reply related
* Re: dpdk16.07 and virtio "Cannot mmap IO port resource"
From: Gopakumar Choorakkot Edakkunni @ 2016-12-10 23:21 UTC (permalink / raw)
To: dev, Olivier Matz
In-Reply-To: <CABK1yFDyLs4nzNPejCF=U63zdvcyFUNMEh0YX1F4z_RDzcwidg@mail.gmail.com>
Hi Oliver,
Looking at the kernel code pci_mmap_resource()--->pci_mmap_fits(), it looks
like pci_mmap_fits() expects that the "number of pages" requested to map is
no larger than the actual size of the pci resource. But in
pci_uio_ioport_map() what is passed as the requested size is the end_addr
of the resource, which in my case is 0xc09f, but the size of the resource
itself is 0x20 and hence kernel expects one page - but 0xc09f+1
(end_addr+1) gets translated to 13 pages ! And I guess that leads to the
mmap to fail .. Thoughts on this ?
Rgds,
Gopa.
On Fri, Dec 9, 2016 at 8:30 PM, Gopakumar Choorakkot Edakkunni <
gopakumar.c.e@gmail.com> wrote:
> I tried to load up dpdk (bound to uio_pci_generic, tried igb_uio also!) on
> a virtio interface. Dpdk exits with the "Cannot mmap IO port resource"
> complaint - the call chain is legacy_virtio_resource_init()-->pci_uio_ioport_map().
>
>
> If anyone can give any clues/pointers as to what might be wrong, that can
> greatly help in getting me on the right track fast !
>
> ---
> EAL: probe driver: 1af4:1000 rte_virtio_pmd
> EAL: PCI device 0000:00:05.0 on NUMA socket 0
> EAL: probe driver: 1af4:1000 r[ 330.753458] ------------[ cut here
> ]------------
> rte_virtio_pmd
> [ 330.754430] WARNING: CPU: 0 PID: 8063 at drivers/pci/pci-sysfs.c:984
> pci_mmap_resource.isra.14+0x113/0x1b0()
> [ 330.756083] process "dpdk_master" tried to map 0x0000d000 bytes at page
> 0x00000000 on 0000:00:05.0 BAR 0 (start 0x c080, size
> 0x 20)
> [ 330.758272] Modules linked in: rte_kni igb_uio pppoe ppp_async
> iptable_nat cdc_mbim sierra_net rndis_host qmi_wwan qcserial pppox
> ppp_generic option nf_nat_pptp nf_nat_ipv4 nf_nat_amanda nf_conntrack_pptp
> nf_conntrack_ipv4 nf_conntrack_amanda ipt_MASQUERADE huawei_cdc_ncm
> cdc_subset cdc_ncm cdc_ether cdc_eem ax88179_178a asix xt_u32 xt_time
> xt_tcpmss xt_string xt_statistic xt_state xt_socket xt_recent xt_quota
> xt_pkttype xt_physdev xt_owner xt_nat xt_multiport xt_mark xt_mac xt_limit
> xt_length xt_iprange xt_id xt_hl xt_helper xt_hashlimit xt_esp xt_ecn
> xt_dscp xt_conntrack xt_connmark xt_connlimit xt_connbytes xt_comment
> xt_addrtype xt_TPROXY xt_TEE xt_TCPMSS xt_REDIRECT xt_NETMAP xt_LOG xt_LED
> xt_HL xt_DSCP xt_CT xt_CLASSIFY usbnet usb_wwan ts_kmp ts_fsm ts_bm slhc
> sierra pl2303 nfnetlink_queue nfnetlink_log nf_nat_tftp nf_nat_snmp_basic
> nf_nat_sip nf_nat_proto_gre nf_nat_irc nf_nat_h323 nf_nat_ftp nf_nat
> nf_defrag_ipv4 nf_conntrack_tftp nf_conntrack_snmp nf_conntrack_sip
> nf_conntrack_proto_gre nf_conntrack_netlink nf_conntrack_irc
> nf_conntrack_h323 nf_conntrack_ftp nf_conntrack_broadcast
> lib80211_crypt_wep lib80211_crypt_tkip lib80211_crypt_ccmp lib80211
> iptable_raw iptable_mangle iptable_filter ipt_ah ipt_ULOG ipt_REJECT
> ipt_ECN hso ftdi_sio crc8 crc7 crc_itu_t crc_ccitt cp210x cordic
> compat_xtables cdc_wdm cdc_acm arptable_filter arpt_mangle arp_tables
> sch_teql sch_tbf sch_sfq sch_red sch_prio sch_netem sch_htb sch_gred
> sch_dsmark sch_codel em_text em_nbyte em_meta em_cmp cls_basic act_police
> act_ipt act_connmark act_skbedit act_mirred em_u32 cls_u32 cls_tcindex
> cls_flow cls_route cls_fw sch_hfsc sch_ingress evdev xt_NFQUEUE xt_set
> ip_set_list_set ip_set_hash_netport ip_set_hash_netiface ip_set_hash_net
> ip_set_hash_ipportnet ip_set_hash_ipportip ip_set_hash_ipport
> ip_set_hash_ip ip_set_bitmap_port ip_set_bitmap_ipmac ip_set_bitmap_ip
> ip_set nfnetlink sr_mod cdrom ip6t_REJECT ip6table_raw ip6table_mangle
> ip6table_filter ip6_tables nf_conntrack_ipv6 nf_conntrack nf_defrag_ipv6
> ifb ipip ip6_tunnel tunnel6 tunnel4 ip_tunnel tun mdio loop vfat fat isofs
> nls_utf8 nls_iso8859_15 nls_iso8859_1 nls_cp850 nls_cp437 rfkill virtio_rng
> sha512_generic sha256_generic sha1_generic md5 arc4 ath10k_pci ath10k_core
> ath9k ath9k_common ath9k_hw ath mac80211 cfg80211 compat pcnet32 e1000
> virtio_net ohci_hcd ixgbevf ixgbe hwmon igbvf igb dsa_core mii [last
> unloaded: igb_uio]
> [ 330.805110] CPU: 0 PID: 8063 Comm: dpdk_master Tainted: G W
> 3.14.67 #1
> [ 330.806104] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS
> Bochs 01/01/2011
> [ 330.806104] 0000000000000286 0000000000000000 ffffffff814e167c
> 0000000000000006
> [ 330.806104] ffff88008b573cd8 ffffffff81259d73 ffffffff81061b72
> ffff88013b24fae0
> [ 330.806104] ffff88013b24f800 0000000000000000 ffff88013a498000
> ffff88013b24f8a8
> [ 330.806104] Call Trace:
> [ 330.806104] [<ffffffff814e167c>] ? dump_stack+0x5e/0x7a
> [ 330.806104] [<ffffffff81259d73>] ? pci_mmap_resource.isra.14+0x11
> 3/0x1b0
> [ 330.806104] [<ffffffff81061b72>] ? warn_slowpath_common+0x82/0xb0
> [ 330.806104] [<ffffffff81061c55>] ? warn_slowpath_fmt+0x45/0x50
> [ 330.806104] [<ffffffff81120321>] ? do_last.isra.58+0xac1/0xc00
> [ 330.806104] [<ffffffff81259d73>] ? pci_mmap_resource.isra.14+0x11
> 3/0x1b0
> [ 330.806104] [<ffffffff8116da79>] ? kernfs_fop_mmap+0x69/0x100
> [ 330.806104] [<ffffffff810f4018>] ? mmap_region+0x2e8/0x560
> [ 330.806104] [<ffffffff810f45a8>] ? do_mmap_pgoff+0x318/0x3b0
> [ 330.806104] [<ffffffff810e1724>] ? vm_mmap_pgoff+0x74/0xc0
> [ 330.806104] [<ffffffff810f2d1a>] ? SyS_mmap_pgoff+0x18a/0x1e0
> [ 330.806104] [<ffffffff814e7759>] ? system_call_fastpath+0x16/0x1b
> [ 330.823897] ---[ end trace c6106b67c768d501 ]---
> EAL: Cannot mmap IO port resource: Invalid argument
> EAL: Error - exiting with code: 1
> Cause: Requested device 0000:00:05.0 cannot be used
>
^ permalink raw reply
* DPDK NIC is unreachable
From: Priyanka @ 2016-12-10 16:46 UTC (permalink / raw)
To: dpd >> dev@dpdk.org, users@dpdk.org; +Cc: mitaliyada
Hi,
We have a SRIOV+ DPDK 16.04 setup for a VM using KVM-qemu hypervisor. We
are unable to ping the VM. We are assigning the VM to a SRIOV vf and for
the DPDK enabled NIC on the VM to detect this VF, we are using KNI.
We used the KNI app available in the examples folder. Although the non
DPDK NIC is reachable in the VM but once we assign an IP using KNI to
the DPDK NIC of the VM, it is unreachable.
Please help us solve this issue.
Thanks,
Priyanka
^ permalink raw reply
* [PATCH v3 31/31] net/i40e: remove unused macro from PMD
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/Makefile | 2 +-
drivers/net/i40e/i40e_ethdev.c | 40 ----------------------------------------
2 files changed, 1 insertion(+), 41 deletions(-)
diff --git a/drivers/net/i40e/Makefile b/drivers/net/i40e/Makefile
index 13085fb..66997b6 100644
--- a/drivers/net/i40e/Makefile
+++ b/drivers/net/i40e/Makefile
@@ -38,7 +38,7 @@ LIB = librte_pmd_i40e.a
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS) -DPF_DRIVER -DVF_DRIVER -DINTEGRATED_VF
-CFLAGS += -DX722_SUPPORT -DX722_A0_SUPPORT
+CFLAGS += -DX722_A0_SUPPORT
EXPORT_MAP := rte_pmd_i40e_version.map
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index b2f827c..f42f4ba 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -6198,18 +6198,14 @@ i40e_parse_hena(uint64_t flags)
rss_hf |= ETH_RSS_FRAG_IPV4;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP))
rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
-#ifdef X722_SUPPORT
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK))
rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
-#endif
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP))
rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
-#ifdef X722_SUPPORT
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP))
rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP))
rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
-#endif
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP))
rss_hf |= ETH_RSS_NONFRAG_IPV4_SCTP;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER))
@@ -6218,18 +6214,14 @@ i40e_parse_hena(uint64_t flags)
rss_hf |= ETH_RSS_FRAG_IPV6;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP))
rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
-#ifdef X722_SUPPORT
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK))
rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
-#endif
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP))
rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
-#ifdef X722_SUPPORT
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP))
rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP))
rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
-#endif
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP))
rss_hf |= ETH_RSS_NONFRAG_IPV6_SCTP;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_OTHER))
@@ -7101,7 +7093,6 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT |
I40E_INSET_FLEX_PAYLOAD,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP] =
I40E_INSET_DMAC | I40E_INSET_SMAC |
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
@@ -7120,7 +7111,6 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT |
I40E_INSET_FLEX_PAYLOAD,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV4_TCP] =
I40E_INSET_DMAC | I40E_INSET_SMAC |
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
@@ -7130,7 +7120,6 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT |
I40E_INSET_TCP_FLAGS | I40E_INSET_FLEX_PAYLOAD,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK] =
I40E_INSET_DMAC | I40E_INSET_SMAC |
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
@@ -7140,7 +7129,6 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT |
I40E_INSET_TCP_FLAGS | I40E_INSET_FLEX_PAYLOAD,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV4_SCTP] =
I40E_INSET_DMAC | I40E_INSET_SMAC |
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
@@ -7174,7 +7162,6 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV6_HOP_LIMIT | I40E_INSET_IPV6_SRC |
I40E_INSET_IPV6_DST | I40E_INSET_SRC_PORT |
I40E_INSET_DST_PORT | I40E_INSET_FLEX_PAYLOAD,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP] =
I40E_INSET_DMAC | I40E_INSET_SMAC |
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
@@ -7193,7 +7180,6 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV6_DST | I40E_INSET_SRC_PORT |
I40E_INSET_DST_PORT | I40E_INSET_TCP_FLAGS |
I40E_INSET_FLEX_PAYLOAD,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV6_TCP] =
I40E_INSET_DMAC | I40E_INSET_SMAC |
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
@@ -7203,7 +7189,6 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV6_DST | I40E_INSET_SRC_PORT |
I40E_INSET_DST_PORT | I40E_INSET_TCP_FLAGS |
I40E_INSET_FLEX_PAYLOAD,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK] =
I40E_INSET_DMAC | I40E_INSET_SMAC |
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
@@ -7213,7 +7198,6 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV6_DST | I40E_INSET_SRC_PORT |
I40E_INSET_DST_PORT | I40E_INSET_TCP_FLAGS |
I40E_INSET_FLEX_PAYLOAD,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV6_SCTP] =
I40E_INSET_DMAC | I40E_INSET_SMAC |
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
@@ -7253,7 +7237,6 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP] =
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
@@ -7264,19 +7247,16 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV4_TCP] =
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK] =
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV4_SCTP] =
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
@@ -7298,7 +7278,6 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV6_SRC | I40E_INSET_IPV6_DST |
I40E_INSET_IPV6_TC | I40E_INSET_IPV6_HOP_LIMIT |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP] =
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
I40E_INSET_IPV6_SRC | I40E_INSET_IPV6_DST |
@@ -7309,19 +7288,16 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV6_SRC | I40E_INSET_IPV6_DST |
I40E_INSET_IPV6_TC | I40E_INSET_IPV6_HOP_LIMIT |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV6_TCP] =
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
I40E_INSET_IPV6_SRC | I40E_INSET_IPV6_DST |
I40E_INSET_IPV6_TC | I40E_INSET_IPV6_HOP_LIMIT |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK] =
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
I40E_INSET_IPV6_SRC | I40E_INSET_IPV6_DST |
I40E_INSET_IPV6_TC | I40E_INSET_IPV6_HOP_LIMIT |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV6_SCTP] =
I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER |
I40E_INSET_IPV6_SRC | I40E_INSET_IPV6_DST |
@@ -7374,22 +7350,18 @@ i40e_get_default_input_set(uint16_t pctype)
[I40E_FILTER_PCTYPE_NONF_IPV4_UDP] =
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP] =
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
[I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP] =
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV4_TCP] =
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK] =
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV4_SCTP] =
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT |
@@ -7401,22 +7373,18 @@ i40e_get_default_input_set(uint16_t pctype)
[I40E_FILTER_PCTYPE_NONF_IPV6_UDP] =
I40E_INSET_IPV6_SRC | I40E_INSET_IPV6_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP] =
I40E_INSET_IPV6_SRC | I40E_INSET_IPV6_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
[I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP] =
I40E_INSET_IPV6_SRC | I40E_INSET_IPV6_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV6_TCP] =
I40E_INSET_IPV6_SRC | I40E_INSET_IPV6_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK] =
I40E_INSET_IPV6_SRC | I40E_INSET_IPV6_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV6_SCTP] =
I40E_INSET_IPV6_SRC | I40E_INSET_IPV6_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT |
@@ -8215,18 +8183,14 @@ i40e_pctype_to_flowtype(enum i40e_filter_pctype pctype)
[I40E_FILTER_PCTYPE_FRAG_IPV4] = RTE_ETH_FLOW_FRAG_IPV4,
[I40E_FILTER_PCTYPE_NONF_IPV4_UDP] =
RTE_ETH_FLOW_NONFRAG_IPV4_UDP,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP] =
RTE_ETH_FLOW_NONFRAG_IPV4_UDP,
[I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP] =
RTE_ETH_FLOW_NONFRAG_IPV4_UDP,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV4_TCP] =
RTE_ETH_FLOW_NONFRAG_IPV4_TCP,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK] =
RTE_ETH_FLOW_NONFRAG_IPV4_TCP,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV4_SCTP] =
RTE_ETH_FLOW_NONFRAG_IPV4_SCTP,
[I40E_FILTER_PCTYPE_NONF_IPV4_OTHER] =
@@ -8234,18 +8198,14 @@ i40e_pctype_to_flowtype(enum i40e_filter_pctype pctype)
[I40E_FILTER_PCTYPE_FRAG_IPV6] = RTE_ETH_FLOW_FRAG_IPV6,
[I40E_FILTER_PCTYPE_NONF_IPV6_UDP] =
RTE_ETH_FLOW_NONFRAG_IPV6_UDP,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP] =
RTE_ETH_FLOW_NONFRAG_IPV6_UDP,
[I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP] =
RTE_ETH_FLOW_NONFRAG_IPV6_UDP,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV6_TCP] =
RTE_ETH_FLOW_NONFRAG_IPV6_TCP,
-#ifdef X722_SUPPORT
[I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK] =
RTE_ETH_FLOW_NONFRAG_IPV6_TCP,
-#endif
[I40E_FILTER_PCTYPE_NONF_IPV6_SCTP] =
RTE_ETH_FLOW_NONFRAG_IPV6_SCTP,
[I40E_FILTER_PCTYPE_NONF_IPV6_OTHER] =
--
2.4.11
^ permalink raw reply related
* [PATCH v3 30/31] net/i40e/base: remove unused macro
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
remove X722_SUPPORT and I40E_NDIS_SUPPORT MACROs
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_adminq_cmd.h | 14 -----------
drivers/net/i40e/base/i40e_common.c | 18 +-------------
drivers/net/i40e/base/i40e_devids.h | 2 --
drivers/net/i40e/base/i40e_nvm.c | 16 -------------
drivers/net/i40e/base/i40e_prototype.h | 6 -----
drivers/net/i40e/base/i40e_register.h | 2 --
drivers/net/i40e/base/i40e_type.h | 42 ---------------------------------
7 files changed, 1 insertion(+), 99 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
index 4e00516..67cef7c 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -139,12 +139,10 @@ enum i40e_admin_queue_opc {
i40e_aqc_opc_list_func_capabilities = 0x000A,
i40e_aqc_opc_list_dev_capabilities = 0x000B,
-#ifdef X722_SUPPORT
/* Proxy commands */
i40e_aqc_opc_set_proxy_config = 0x0104,
i40e_aqc_opc_set_ns_proxy_table_entry = 0x0105,
-#endif
/* LAA */
i40e_aqc_opc_mac_address_read = 0x0107,
i40e_aqc_opc_mac_address_write = 0x0108,
@@ -152,13 +150,11 @@ enum i40e_admin_queue_opc {
/* PXE */
i40e_aqc_opc_clear_pxe_mode = 0x0110,
-#ifdef X722_SUPPORT
/* WoL commands */
i40e_aqc_opc_set_wol_filter = 0x0120,
i40e_aqc_opc_get_wake_reason = 0x0121,
i40e_aqc_opc_clear_all_wol_filters = 0x025E,
-#endif
/* internal switch commands */
i40e_aqc_opc_get_switch_config = 0x0200,
i40e_aqc_opc_add_statistics = 0x0201,
@@ -283,12 +279,10 @@ enum i40e_admin_queue_opc {
/* Tunnel commands */
i40e_aqc_opc_add_udp_tunnel = 0x0B00,
i40e_aqc_opc_del_udp_tunnel = 0x0B01,
-#ifdef X722_SUPPORT
i40e_aqc_opc_set_rss_key = 0x0B02,
i40e_aqc_opc_set_rss_lut = 0x0B03,
i40e_aqc_opc_get_rss_key = 0x0B04,
i40e_aqc_opc_get_rss_lut = 0x0B05,
-#endif
/* Async Events */
i40e_aqc_opc_event_lan_overflow = 0x1001,
@@ -587,7 +581,6 @@ struct i40e_aqc_clear_pxe {
I40E_CHECK_CMD_LENGTH(i40e_aqc_clear_pxe);
-#ifdef X722_SUPPORT
/* Set WoL Filter (0x0120) */
struct i40e_aqc_set_wol_filter {
@@ -639,7 +632,6 @@ struct i40e_aqc_get_wake_reason_completion {
I40E_CHECK_CMD_LENGTH(i40e_aqc_get_wake_reason_completion);
-#endif /* X722_SUPPORT */
/* Switch configuration commands (0x02xx) */
/* Used by many indirect commands that only pass an seid and a buffer in the
@@ -944,16 +936,12 @@ struct i40e_aqc_vsi_properties_data {
I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT)
/* queueing option section */
u8 queueing_opt_flags;
-#ifdef X722_SUPPORT
#define I40E_AQ_VSI_QUE_OPT_MULTICAST_UDP_ENA 0x04
#define I40E_AQ_VSI_QUE_OPT_UNICAST_UDP_ENA 0x08
-#endif
#define I40E_AQ_VSI_QUE_OPT_TCP_ENA 0x10
#define I40E_AQ_VSI_QUE_OPT_FCOE_ENA 0x20
-#ifdef X722_SUPPORT
#define I40E_AQ_VSI_QUE_OPT_RSS_LUT_PF 0x00
#define I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI 0x40
-#endif
u8 queueing_opt_reserved[3];
/* scheduler section */
u8 up_enable_bits;
@@ -2427,7 +2415,6 @@ struct i40e_aqc_del_udp_tunnel_completion {
};
I40E_CHECK_CMD_LENGTH(i40e_aqc_del_udp_tunnel_completion);
-#ifdef X722_SUPPORT
struct i40e_aqc_get_set_rss_key {
#define I40E_AQC_SET_RSS_KEY_VSI_VALID (0x1 << 15)
@@ -2468,7 +2455,6 @@ struct i40e_aqc_get_set_rss_lut {
};
I40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_lut);
-#endif
/* tunnel key structure 0x0B10 */
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 6a0362d..b8d8165 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -71,7 +71,6 @@ STATIC enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw)
case I40E_DEV_ID_25G_SFP28:
hw->mac.type = I40E_MAC_XL710;
break;
-#ifdef X722_SUPPORT
#ifdef X722_A0_SUPPORT
case I40E_DEV_ID_X722_A0:
#endif
@@ -83,8 +82,6 @@ STATIC enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw)
case I40E_DEV_ID_SFP_I_X722:
hw->mac.type = I40E_MAC_X722;
break;
-#endif
-#ifdef X722_SUPPORT
#if defined(INTEGRATED_VF) || defined(VF_DRIVER)
case I40E_DEV_ID_X722_VF:
#ifdef X722_A0_SUPPORT
@@ -93,7 +90,6 @@ STATIC enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw)
hw->mac.type = I40E_MAC_X722_VF;
break;
#endif /* INTEGRATED_VF || VF_DRIVER */
-#endif /* X722_SUPPORT */
#if defined(INTEGRATED_VF) || defined(VF_DRIVER)
case I40E_DEV_ID_VF:
case I40E_DEV_ID_VF_HV:
@@ -113,7 +109,6 @@ STATIC enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw)
return status;
}
-#ifndef I40E_NDIS_SUPPORT
/**
* i40e_aq_str - convert AQ err code to a string
* @hw: pointer to the HW structure
@@ -320,7 +315,6 @@ const char *i40e_stat_str(struct i40e_hw *hw, enum i40e_status_code stat_err)
return hw->err_str;
}
-#endif /* I40E_NDIS_SUPPORT */
/**
* i40e_debug_aq
* @hw: debug mask related to admin queue
@@ -446,7 +440,6 @@ enum i40e_status_code i40e_aq_queue_shutdown(struct i40e_hw *hw,
return status;
}
-#ifdef X722_SUPPORT
/**
* i40e_aq_get_set_rss_lut
@@ -605,7 +598,6 @@ enum i40e_status_code i40e_aq_set_rss_key(struct i40e_hw *hw,
{
return i40e_aq_get_set_rss_key(hw, vsi_id, key, true);
}
-#endif /* X722_SUPPORT */
/* The i40e_ptype_lookup table is used to convert from the 8-bit ptype in the
* hardware to a bit-field that can be used by SW to more easily determine the
@@ -1021,9 +1013,7 @@ enum i40e_status_code i40e_init_shared_code(struct i40e_hw *hw)
switch (hw->mac.type) {
case I40E_MAC_XL710:
-#ifdef X722_SUPPORT
case I40E_MAC_X722:
-#endif
break;
default:
return I40E_ERR_DEVICE_NOT_SUPPORTED;
@@ -1043,11 +1033,9 @@ enum i40e_status_code i40e_init_shared_code(struct i40e_hw *hw)
else
hw->pf_id = (u8)(func_rid & 0x7);
-#ifdef X722_SUPPORT
if (hw->mac.type == I40E_MAC_X722)
hw->flags |= I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE;
-#endif
status = i40e_init_nvm(hw);
return status;
}
@@ -3916,7 +3904,6 @@ STATIC void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
if (number & I40E_NVM_MGMT_UPDATE_DISABLED)
p->update_disabled = true;
break;
-#ifdef X722_SUPPORT
case I40E_AQ_CAP_ID_WOL_AND_PROXY:
hw->num_wol_proxy_filters = (u16)number;
hw->wol_proxy_vsi_seid = (u16)logical_id;
@@ -3930,7 +3917,6 @@ STATIC void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
"HW Capability: WOL proxy filters = %d\n",
hw->num_wol_proxy_filters);
break;
-#endif
default:
break;
}
@@ -6823,7 +6809,6 @@ enum i40e_status_code i40e_vf_reset(struct i40e_hw *hw)
I40E_SUCCESS, NULL, 0, NULL);
}
#endif /* VF_DRIVER */
-#ifdef X722_SUPPORT
/**
* i40e_aq_set_arp_proxy_config
@@ -7012,5 +6997,4 @@ enum i40e_status_code i40e_aq_clear_all_wol_filters(struct i40e_hw *hw,
status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
return status;
-}
-#endif /* X722_SUPPORT */
+}
\ No newline at end of file
diff --git a/drivers/net/i40e/base/i40e_devids.h b/drivers/net/i40e/base/i40e_devids.h
index 19bb376..4546689 100644
--- a/drivers/net/i40e/base/i40e_devids.h
+++ b/drivers/net/i40e/base/i40e_devids.h
@@ -55,7 +55,6 @@ POSSIBILITY OF SUCH DAMAGE.
#define I40E_DEV_ID_VF 0x154C
#define I40E_DEV_ID_VF_HV 0x1571
#endif /* VF_DRIVER */
-#ifdef X722_SUPPORT
#ifdef X722_A0_SUPPORT
#define I40E_DEV_ID_X722_A0 0x374C
#if defined(INTEGRATED_VF) || defined(VF_DRIVER)
@@ -71,7 +70,6 @@ POSSIBILITY OF SUCH DAMAGE.
#if defined(INTEGRATED_VF) || defined(VF_DRIVER) || defined(I40E_NDIS_SUPPORT)
#define I40E_DEV_ID_X722_VF 0x37CD
#endif /* VF_DRIVER */
-#endif /* X722_SUPPORT */
#define i40e_is_40G_device(d) ((d) == I40E_DEV_ID_QSFP_A || \
(d) == I40E_DEV_ID_QSFP_B || \
diff --git a/drivers/net/i40e/base/i40e_nvm.c b/drivers/net/i40e/base/i40e_nvm.c
index 4f4a645..e896502 100644
--- a/drivers/net/i40e/base/i40e_nvm.c
+++ b/drivers/net/i40e/base/i40e_nvm.c
@@ -221,15 +221,11 @@ enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset,
ret_code = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
if (!ret_code) {
-#ifdef X722_SUPPORT
if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE) {
ret_code = i40e_read_nvm_word_aq(hw, offset, data);
} else {
ret_code = i40e_read_nvm_word_srctl(hw, offset, data);
}
-#else
- ret_code = i40e_read_nvm_word_srctl(hw, offset, data);
-#endif
i40e_release_nvm(hw);
}
return ret_code;
@@ -249,14 +245,10 @@ enum i40e_status_code __i40e_read_nvm_word(struct i40e_hw *hw,
{
enum i40e_status_code ret_code = I40E_SUCCESS;
-#ifdef X722_SUPPORT
if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE)
ret_code = i40e_read_nvm_word_aq(hw, offset, data);
else
ret_code = i40e_read_nvm_word_srctl(hw, offset, data);
-#else
- ret_code = i40e_read_nvm_word_srctl(hw, offset, data);
-#endif
return ret_code;
}
@@ -348,14 +340,10 @@ enum i40e_status_code __i40e_read_nvm_buffer(struct i40e_hw *hw,
{
enum i40e_status_code ret_code = I40E_SUCCESS;
-#ifdef X722_SUPPORT
if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE)
ret_code = i40e_read_nvm_buffer_aq(hw, offset, words, data);
else
ret_code = i40e_read_nvm_buffer_srctl(hw, offset, words, data);
-#else
- ret_code = i40e_read_nvm_buffer_srctl(hw, offset, words, data);
-#endif
return ret_code;
}
@@ -375,7 +363,6 @@ enum i40e_status_code i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset,
{
enum i40e_status_code ret_code = I40E_SUCCESS;
-#ifdef X722_SUPPORT
if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE) {
ret_code = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
if (!ret_code) {
@@ -386,9 +373,6 @@ enum i40e_status_code i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset,
} else {
ret_code = i40e_read_nvm_buffer_srctl(hw, offset, words, data);
}
-#else
- ret_code = i40e_read_nvm_buffer_srctl(hw, offset, words, data);
-#endif
return ret_code;
}
diff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h
index ed6cdd6..109d3c5 100644
--- a/drivers/net/i40e/base/i40e_prototype.h
+++ b/drivers/net/i40e/base/i40e_prototype.h
@@ -78,7 +78,6 @@ void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask,
void i40e_idle_aq(struct i40e_hw *hw);
bool i40e_check_asq_alive(struct i40e_hw *hw);
enum i40e_status_code i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading);
-#ifdef X722_SUPPORT
enum i40e_status_code i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid,
bool pf_lut, u8 *lut, u16 lut_size);
@@ -90,11 +89,8 @@ enum i40e_status_code i40e_aq_get_rss_key(struct i40e_hw *hw,
enum i40e_status_code i40e_aq_set_rss_key(struct i40e_hw *hw,
u16 seid,
struct i40e_aqc_get_set_rss_key_data *key);
-#endif
-#ifndef I40E_NDIS_SUPPORT
const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err);
const char *i40e_stat_str(struct i40e_hw *hw, enum i40e_status_code stat_err);
-#endif /* I40E_NDIS_SUPPORT */
#ifdef PF_DRIVER
@@ -527,7 +523,6 @@ enum i40e_status_code i40e_aq_rx_ctl_write_register(struct i40e_hw *hw,
u32 reg_addr, u32 reg_val,
struct i40e_asq_cmd_details *cmd_details);
void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val);
-#ifdef X722_SUPPORT
enum i40e_status_code i40e_aq_set_arp_proxy_config(struct i40e_hw *hw,
struct i40e_aqc_arp_proxy_data *proxy_config,
struct i40e_asq_cmd_details *cmd_details);
@@ -545,7 +540,6 @@ enum i40e_status_code i40e_aq_get_wake_event_reason(struct i40e_hw *hw,
struct i40e_asq_cmd_details *cmd_details);
enum i40e_status_code i40e_aq_clear_all_wol_filters(struct i40e_hw *hw,
struct i40e_asq_cmd_details *cmd_details);
-#endif
enum i40e_status_code i40e_read_phy_register_clause22(struct i40e_hw *hw,
u16 reg, u8 phy_addr, u16 *value);
enum i40e_status_code i40e_write_phy_register_clause22(struct i40e_hw *hw,
diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index fd0a723..3a305b6 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -3401,7 +3401,6 @@ POSSIBILITY OF SUCH DAMAGE.
#define I40E_VFQF_HREGION_OVERRIDE_ENA_7_MASK I40E_MASK(0x1, I40E_VFQF_HREGION_OVERRIDE_ENA_7_SHIFT)
#define I40E_VFQF_HREGION_REGION_7_SHIFT 29
#define I40E_VFQF_HREGION_REGION_7_MASK I40E_MASK(0x7, I40E_VFQF_HREGION_REGION_7_SHIFT)
-#ifdef X722_SUPPORT
#ifdef PF_DRIVER
#define I40E_MNGSB_FDCRC 0x000B7050 /* Reset: POR */
@@ -5366,5 +5365,4 @@ POSSIBILITY OF SUCH DAMAGE.
#define I40E_VFPE_WQEALLOC1_WQE_DESC_INDEX_SHIFT 20
#define I40E_VFPE_WQEALLOC1_WQE_DESC_INDEX_MASK I40E_MASK(0xFFF, I40E_VFPE_WQEALLOC1_WQE_DESC_INDEX_SHIFT)
-#endif /* X722_SUPPORT */
#endif /* _I40E_REGISTER_H_ */
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 56e47ea..590d97c 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -196,9 +196,7 @@ enum i40e_memcpy_type {
I40E_DMA_TO_NONDMA
};
-#ifdef X722_SUPPORT
#define I40E_FW_API_VERSION_MINOR_X722 0x0005
-#endif
#define I40E_FW_API_VERSION_MINOR_X710 0x0005
@@ -214,10 +212,8 @@ enum i40e_mac_type {
I40E_MAC_UNKNOWN = 0,
I40E_MAC_XL710,
I40E_MAC_VF,
-#ifdef X722_SUPPORT
I40E_MAC_X722,
I40E_MAC_X722_VF,
-#endif
I40E_MAC_GENERIC,
};
@@ -359,7 +355,6 @@ struct i40e_phy_info {
#define I40E_HW_CAP_MDIO_PORT_MODE_MDIO 0
#define I40E_HW_CAP_MDIO_PORT_MODE_I2C 1
-#ifdef X722_SUPPORT
enum i40e_acpi_programming_method {
I40E_ACPI_PROGRAMMING_METHOD_HW_FVL = 0,
I40E_ACPI_PROGRAMMING_METHOD_AQC_FPK = 1
@@ -369,7 +364,6 @@ enum i40e_acpi_programming_method {
#define I40E_ACPI_PROGRAMMING_METHOD_MASK 0x2
#define I40E_PROXY_SUPPORT_MASK 0x4
-#endif
/* Capabilities of a PF or a VF or the whole device */
struct i40e_hw_capabilities {
u32 switch_mode;
@@ -437,11 +431,9 @@ struct i40e_hw_capabilities {
u32 enabled_tcmap;
u32 maxtc;
u64 wr_csr_prot;
-#ifdef X722_SUPPORT
bool apm_wol_support;
enum i40e_acpi_programming_method acpi_prog_method;
bool proxy_support;
-#endif
};
struct i40e_mac_info {
@@ -703,30 +695,22 @@ struct i40e_hw {
struct i40e_dcbx_config remote_dcbx_config; /* Peer Cfg */
struct i40e_dcbx_config desired_dcbx_config; /* CEE Desired Cfg */
-#ifdef X722_SUPPORT
/* WoL and proxy support */
u16 num_wol_proxy_filters;
u16 wol_proxy_vsi_seid;
-#endif
#define I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE BIT_ULL(0)
u64 flags;
/* debug mask */
u32 debug_mask;
-#ifndef I40E_NDIS_SUPPORT
char err_str[16];
-#endif /* I40E_NDIS_SUPPORT */
};
STATIC INLINE bool i40e_is_vf(struct i40e_hw *hw)
{
-#ifdef X722_SUPPORT
return (hw->mac.type == I40E_MAC_VF ||
hw->mac.type == I40E_MAC_X722_VF);
-#else
- return hw->mac.type == I40E_MAC_VF;
-#endif
}
struct i40e_driver_version {
@@ -830,11 +814,7 @@ enum i40e_rx_desc_status_bits {
I40E_RX_DESC_STATUS_CRCP_SHIFT = 4,
I40E_RX_DESC_STATUS_TSYNINDX_SHIFT = 5, /* 2 BITS */
I40E_RX_DESC_STATUS_TSYNVALID_SHIFT = 7,
-#ifdef X722_SUPPORT
I40E_RX_DESC_STATUS_EXT_UDP_0_SHIFT = 8,
-#else
- I40E_RX_DESC_STATUS_RESERVED1_SHIFT = 8,
-#endif
I40E_RX_DESC_STATUS_UMBCAST_SHIFT = 9, /* 2 BITS */
I40E_RX_DESC_STATUS_FLM_SHIFT = 11,
@@ -842,11 +822,7 @@ enum i40e_rx_desc_status_bits {
I40E_RX_DESC_STATUS_LPBK_SHIFT = 14,
I40E_RX_DESC_STATUS_IPV6EXADD_SHIFT = 15,
I40E_RX_DESC_STATUS_RESERVED2_SHIFT = 16, /* 2 BITS */
-#ifdef X722_SUPPORT
I40E_RX_DESC_STATUS_INT_UDP_0_SHIFT = 18,
-#else
- I40E_RX_DESC_STATUS_UDP_0_SHIFT = 18,
-#endif
I40E_RX_DESC_STATUS_LAST /* this entry must be last!!! */
};
@@ -1224,10 +1200,8 @@ enum i40e_tx_ctx_desc_eipt_offload {
#define I40E_TXD_CTX_QW0_DECTTL_MASK (0xFULL << \
I40E_TXD_CTX_QW0_DECTTL_SHIFT)
-#ifdef X722_SUPPORT
#define I40E_TXD_CTX_QW0_L4T_CS_SHIFT 23
#define I40E_TXD_CTX_QW0_L4T_CS_MASK BIT_ULL(I40E_TXD_CTX_QW0_L4T_CS_SHIFT)
-#endif
struct i40e_nop_desc {
__le64 rsvd;
__le64 dtype_cmd;
@@ -1264,38 +1238,24 @@ struct i40e_filter_program_desc {
/* Packet Classifier Types for filters */
enum i40e_filter_pctype {
-#ifdef X722_SUPPORT
/* Note: Values 0-28 are reserved for future use.
* Value 29, 30, 32 are not supported on XL710 and X710.
*/
I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP = 29,
I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP = 30,
-#else
- /* Note: Values 0-30 are reserved for future use */
-#endif
I40E_FILTER_PCTYPE_NONF_IPV4_UDP = 31,
-#ifdef X722_SUPPORT
I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK = 32,
-#else
- /* Note: Value 32 is reserved for future use */
-#endif
I40E_FILTER_PCTYPE_NONF_IPV4_TCP = 33,
I40E_FILTER_PCTYPE_NONF_IPV4_SCTP = 34,
I40E_FILTER_PCTYPE_NONF_IPV4_OTHER = 35,
I40E_FILTER_PCTYPE_FRAG_IPV4 = 36,
-#ifdef X722_SUPPORT
/* Note: Values 37-38 are reserved for future use.
* Value 39, 40, 42 are not supported on XL710 and X710.
*/
I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP = 39,
I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP = 40,
-#else
- /* Note: Values 37-40 are reserved for future use */
-#endif
I40E_FILTER_PCTYPE_NONF_IPV6_UDP = 41,
-#ifdef X722_SUPPORT
I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK = 42,
-#endif
I40E_FILTER_PCTYPE_NONF_IPV6_TCP = 43,
I40E_FILTER_PCTYPE_NONF_IPV6_SCTP = 44,
I40E_FILTER_PCTYPE_NONF_IPV6_OTHER = 45,
@@ -1350,12 +1310,10 @@ enum i40e_filter_program_desc_pcmd {
I40E_TXD_FLTR_QW1_CMD_SHIFT)
#define I40E_TXD_FLTR_QW1_FD_STATUS_MASK (0x3ULL << \
I40E_TXD_FLTR_QW1_FD_STATUS_SHIFT)
-#ifdef X722_SUPPORT
#define I40E_TXD_FLTR_QW1_ATR_SHIFT (0xEULL + \
I40E_TXD_FLTR_QW1_CMD_SHIFT)
#define I40E_TXD_FLTR_QW1_ATR_MASK BIT_ULL(I40E_TXD_FLTR_QW1_ATR_SHIFT)
-#endif
#define I40E_TXD_FLTR_QW1_CNTINDEX_SHIFT 20
#define I40E_TXD_FLTR_QW1_CNTINDEX_MASK (0x1FFUL << \
--
2.4.11
^ permalink raw reply related
* [PATCH v3 27/31] net/i40e/base: add broadcast promiscuous control per VLAN
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
Add a new adminq function that allows driver to configure per-VLAN
broadcast promiscuous mode, similar to how we handle unicast and
multicast promiscuous modes.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_common.c | 34 ++++++++++++++++++++++++++++++++++
drivers/net/i40e/base/i40e_prototype.h | 3 +++
2 files changed, 37 insertions(+)
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 852cbf7..14aaac6 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -2461,6 +2461,40 @@ enum i40e_status_code i40e_aq_set_vsi_uc_promisc_on_vlan(struct i40e_hw *hw,
}
/**
+ * i40e_aq_set_vsi_bc_promisc_on_vlan
+ * @hw: pointer to the hw struct
+ * @seid: vsi number
+ * @enable: set broadcast promiscuous enable/disable for a given VLAN
+ * @vid: The VLAN tag filter - capture any broadcast packet with this VLAN tag
+ * @cmd_details: pointer to command details structure or NULL
+ **/
+enum i40e_status_code i40e_aq_set_vsi_bc_promisc_on_vlan(struct i40e_hw *hw,
+ u16 seid, bool enable, u16 vid,
+ struct i40e_asq_cmd_details *cmd_details)
+{
+ struct i40e_aq_desc desc;
+ struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
+ (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
+ enum i40e_status_code status;
+ u16 flags = 0;
+
+ i40e_fill_default_direct_cmd_desc(&desc,
+ i40e_aqc_opc_set_vsi_promiscuous_modes);
+
+ if (enable)
+ flags |= I40E_AQC_SET_VSI_PROMISC_BROADCAST;
+
+ cmd->promiscuous_flags = CPU_TO_LE16(flags);
+ cmd->valid_flags = CPU_TO_LE16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
+ cmd->seid = CPU_TO_LE16(seid);
+ cmd->vlan_tag = CPU_TO_LE16(vid | I40E_AQC_SET_VSI_VLAN_VALID);
+
+ status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
+
+ return status;
+}
+
+/**
* i40e_aq_set_vsi_broadcast
* @hw: pointer to the hw struct
* @seid: vsi number
diff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h
index 98f5689..ed6cdd6 100644
--- a/drivers/net/i40e/base/i40e_prototype.h
+++ b/drivers/net/i40e/base/i40e_prototype.h
@@ -181,6 +181,9 @@ enum i40e_status_code i40e_aq_set_vsi_mc_promisc_on_vlan(struct i40e_hw *hw,
enum i40e_status_code i40e_aq_set_vsi_uc_promisc_on_vlan(struct i40e_hw *hw,
u16 seid, bool enable, u16 vid,
struct i40e_asq_cmd_details *cmd_details);
+enum i40e_status_code i40e_aq_set_vsi_bc_promisc_on_vlan(struct i40e_hw *hw,
+ u16 seid, bool enable, u16 vid,
+ struct i40e_asq_cmd_details *cmd_details);
enum i40e_status_code i40e_aq_set_vsi_vlan_promisc(struct i40e_hw *hw,
u16 seid, bool enable,
struct i40e_asq_cmd_details *cmd_details);
--
2.4.11
^ permalink raw reply related
* [PATCH v3 26/31] net/i40e/base: add ERROR state for NVM update state machine
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
This patch adds I40E_NVMUPD_STATE_ERROR state for NVM update.
Without this patch driver has no possibility to return NVM image write
failure.This state is being set when ARQ rises error.
arq_last_status is also updated every time when ARQ event comes,
not only on error cases.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_adminq.c | 4 ++--
drivers/net/i40e/base/i40e_nvm.c | 17 +++++++++++++++++
drivers/net/i40e/base/i40e_type.h | 2 ++
3 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_adminq.c b/drivers/net/i40e/base/i40e_adminq.c
index 0d3a83f..5bdf3f7 100644
--- a/drivers/net/i40e/base/i40e_adminq.c
+++ b/drivers/net/i40e/base/i40e_adminq.c
@@ -1077,11 +1077,11 @@ enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw,
desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc);
desc_idx = ntc;
+ hw->aq.arq_last_status =
+ (enum i40e_admin_queue_err)LE16_TO_CPU(desc->retval);
flags = LE16_TO_CPU(desc->flags);
if (flags & I40E_AQ_FLAG_ERR) {
ret_code = I40E_ERR_ADMIN_QUEUE_ERROR;
- hw->aq.arq_last_status =
- (enum i40e_admin_queue_err)LE16_TO_CPU(desc->retval);
i40e_debug(hw,
I40E_DEBUG_AQ_MESSAGE,
"AQRX: Event received with error 0x%X.\n",
diff --git a/drivers/net/i40e/base/i40e_nvm.c b/drivers/net/i40e/base/i40e_nvm.c
index 1f345a5..4f4a645 100644
--- a/drivers/net/i40e/base/i40e_nvm.c
+++ b/drivers/net/i40e/base/i40e_nvm.c
@@ -901,9 +901,20 @@ enum i40e_status_code i40e_nvmupd_command(struct i40e_hw *hw,
*((u16 *)&bytes[2]) = hw->nvm_wait_opcode;
}
+ /* Clear error status on read */
+ if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR)
+ hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
+
return I40E_SUCCESS;
}
+ /* Clear status even it is not read and log */
+ if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR) {
+ i40e_debug(hw, I40E_DEBUG_NVM,
+ "Clearing I40E_NVMUPD_STATE_ERROR state without reading\n");
+ hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
+ }
+
switch (hw->nvmupd_state) {
case I40E_NVMUPD_STATE_INIT:
status = i40e_nvmupd_state_init(hw, cmd, bytes, perrno);
@@ -1253,6 +1264,7 @@ STATIC enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,
void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode)
{
if (opcode == hw->nvm_wait_opcode) {
+
i40e_debug(hw, I40E_DEBUG_NVM,
"NVMUPD: clearing wait on opcode 0x%04x\n", opcode);
if (hw->nvm_release_on_done) {
@@ -1261,6 +1273,11 @@ void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode)
}
hw->nvm_wait_opcode = 0;
+ if (hw->aq.arq_last_status) {
+ hw->nvmupd_state = I40E_NVMUPD_STATE_ERROR;
+ return;
+ }
+
switch (hw->nvmupd_state) {
case I40E_NVMUPD_STATE_INIT_WAIT:
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 3784c8f..56e47ea 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -499,6 +499,7 @@ enum i40e_nvmupd_state {
I40E_NVMUPD_STATE_WRITING,
I40E_NVMUPD_STATE_INIT_WAIT,
I40E_NVMUPD_STATE_WRITE_WAIT,
+ I40E_NVMUPD_STATE_ERROR
};
/* nvm_access definition and its masks/shifts need to be accessible to
@@ -1526,6 +1527,7 @@ struct i40e_hw_port_stats {
#define I40E_SR_EMPR_REGS_AUTO_LOAD_PTR 0x3A
#define I40E_SR_GLOBR_REGS_AUTO_LOAD_PTR 0x3B
#define I40E_SR_CORER_REGS_AUTO_LOAD_PTR 0x3C
+#define I40E_SR_PHY_ACTIVITY_LIST_PTR 0x3D
#define I40E_SR_PCIE_ALT_AUTO_LOAD_PTR 0x3E
#define I40E_SR_SW_CHECKSUM_WORD 0x3F
#define I40E_SR_1ST_FREE_PROVISION_AREA_PTR 0x40
--
2.4.11
^ permalink raw reply related
* [PATCH v3 25/31] net/i40e/base: remove duplicate definitions
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
We already define I40E_AQ_PHY_TYPE_EXT_25G* flags in the response adminq
structure above, and do not need to re-define these.
While we are here, replace 0X with 0x as normal style.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_adminq_cmd.h | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
index d4d2a7a..4e00516 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -1785,8 +1785,8 @@ struct i40e_aq_get_phy_abilities_resp {
u8 d3_lpan;
#define I40E_AQ_SET_PHY_D3_LPAN_ENA 0x01
u8 phy_type_ext;
-#define I40E_AQ_PHY_TYPE_EXT_25G_KR 0X01
-#define I40E_AQ_PHY_TYPE_EXT_25G_CR 0X02
+#define I40E_AQ_PHY_TYPE_EXT_25G_KR 0x01
+#define I40E_AQ_PHY_TYPE_EXT_25G_CR 0x02
#define I40E_AQ_PHY_TYPE_EXT_25G_SR 0x04
#define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08
u8 fec_cfg_curr_mod_ext_info;
@@ -1822,10 +1822,6 @@ struct i40e_aq_set_phy_config { /* same bits as above in all */
__le32 eeer;
u8 low_power_ctrl;
u8 phy_type_ext;
-#define I40E_AQ_PHY_TYPE_EXT_25G_KR 0X01
-#define I40E_AQ_PHY_TYPE_EXT_25G_CR 0X02
-#define I40E_AQ_PHY_TYPE_EXT_25G_SR 0x04
-#define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08
u8 fec_config;
#define I40E_AQ_SET_FEC_ABILITY_KR BIT(0)
#define I40E_AQ_SET_FEC_ABILITY_RS BIT(1)
--
2.4.11
^ permalink raw reply related
* [PATCH v3 24/31] net/i40e/base: comment that udp port must be in Host order
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
The firmware expects the Port number to be in Little Endian format, and
the i40e_aq_add_udp_tunnel command clearly expects the udp_port variable
to be in Host order, as it uses CPU_TO_LE16(). It was recently
discovered in the Linux driver that we were passing a Big Endian port
number, which was therefor not enabling the UDP tunnel correctly.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_common.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 17b53ae..852cbf7 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -4419,11 +4419,15 @@ enum i40e_status_code i40e_aq_start_stop_dcbx(struct i40e_hw *hw,
/**
* i40e_aq_add_udp_tunnel
* @hw: pointer to the hw struct
- * @udp_port: the UDP port to add
+ * @udp_port: the UDP port to add in Host byte order
* @header_len: length of the tunneling header length in DWords
* @protocol_index: protocol index type
* @filter_index: pointer to filter index
* @cmd_details: pointer to command details structure or NULL
+ *
+ * Note: Firmware expects the udp_port value to be in Little Endian format,
+ * and this function will call CPU_TO_LE16 to convert from Host byte order to
+ * Little Endian order.
**/
enum i40e_status_code i40e_aq_add_udp_tunnel(struct i40e_hw *hw,
u16 udp_port, u8 protocol_index,
--
2.4.11
^ permalink raw reply related
* [PATCH v3 23/31] net/i40e/base: change shift values to hex
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_type.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 99e080e..3784c8f 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -365,9 +365,9 @@ enum i40e_acpi_programming_method {
I40E_ACPI_PROGRAMMING_METHOD_AQC_FPK = 1
};
-#define I40E_WOL_SUPPORT_MASK 1
-#define I40E_ACPI_PROGRAMMING_METHOD_MASK (1 << 1)
-#define I40E_PROXY_SUPPORT_MASK (1 << 2)
+#define I40E_WOL_SUPPORT_MASK 0x1
+#define I40E_ACPI_PROGRAMMING_METHOD_MASK 0x2
+#define I40E_PROXY_SUPPORT_MASK 0x4
#endif
/* Capabilities of a PF or a VF or the whole device */
--
2.4.11
^ permalink raw reply related
* [PATCH v3 21/31] net/i40e/base: save link FEC info from link up event
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
Store the FEC status bits from the link up event into the
hw_link_info structure.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_common.c | 2 ++
drivers/net/i40e/base/i40e_type.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index e9376dd..17b53ae 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -1961,6 +1961,8 @@ enum i40e_status_code i40e_aq_get_link_info(struct i40e_hw *hw,
hw_link_info->link_speed = (enum i40e_aq_link_speed)resp->link_speed;
hw_link_info->link_info = resp->link_info;
hw_link_info->an_info = resp->an_info;
+ hw_link_info->fec_info = resp->config & (I40E_AQ_CONFIG_FEC_KR_ENA |
+ I40E_AQ_CONFIG_FEC_RS_ENA);
hw_link_info->ext_info = resp->ext_info;
hw_link_info->loopback = resp->loopback;
hw_link_info->max_frame_size = LE16_TO_CPU(resp->max_frame_size);
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 206e95a..99e080e 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -272,6 +272,7 @@ struct i40e_link_status {
enum i40e_aq_link_speed link_speed;
u8 link_info;
u8 an_info;
+ u8 fec_info;
u8 ext_info;
u8 loopback;
/* is Link Status Event notification to SW enabled */
--
2.4.11
^ permalink raw reply related
* [PATCH v3 19/31] net/i40e/base: implement set VSI full promisc mode
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
This patch implements a function to set a VSI to broadcast, multicast, and
unicast promiscuous mode all at once. This is specifically needed to set
the WoL/Proxy VSI created by FW to full promiscuous mode during power down
for WoL patterns and protocol offloads to function properly.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_common.c | 37 ++++++++++++++++++++++++++++++++++
drivers/net/i40e/base/i40e_prototype.h | 3 +++
2 files changed, 40 insertions(+)
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index bae9079..1095e68 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -2354,6 +2354,43 @@ enum i40e_status_code i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,
}
/**
+* i40e_aq_set_vsi_full_promiscuous
+* @hw: pointer to the hw struct
+* @seid: VSI number
+* @set: set promiscuous enable/disable
+* @cmd_details: pointer to command details structure or NULL
+**/
+enum i40e_status_code i40e_aq_set_vsi_full_promiscuous(struct i40e_hw *hw,
+ u16 seid, bool set,
+ struct i40e_asq_cmd_details *cmd_details)
+{
+ struct i40e_aq_desc desc;
+ struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
+ (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
+ enum i40e_status_code status;
+ u16 flags = 0;
+
+ i40e_fill_default_direct_cmd_desc(&desc,
+ i40e_aqc_opc_set_vsi_promiscuous_modes);
+
+ if (set)
+ flags = I40E_AQC_SET_VSI_PROMISC_UNICAST |
+ I40E_AQC_SET_VSI_PROMISC_MULTICAST |
+ I40E_AQC_SET_VSI_PROMISC_BROADCAST;
+
+ cmd->promiscuous_flags = CPU_TO_LE16(flags);
+
+ cmd->valid_flags = CPU_TO_LE16(I40E_AQC_SET_VSI_PROMISC_UNICAST |
+ I40E_AQC_SET_VSI_PROMISC_MULTICAST |
+ I40E_AQC_SET_VSI_PROMISC_BROADCAST);
+
+ cmd->seid = CPU_TO_LE16(seid);
+ status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
+
+ return status;
+}
+
+/**
* i40e_aq_set_vsi_mc_promisc_on_vlan
* @hw: pointer to the hw struct
* @seid: vsi number
diff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h
index 4de96b5..98f5689 100644
--- a/drivers/net/i40e/base/i40e_prototype.h
+++ b/drivers/net/i40e/base/i40e_prototype.h
@@ -172,6 +172,9 @@ enum i40e_status_code i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
bool rx_only_promisc);
enum i40e_status_code i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,
u16 vsi_id, bool set, struct i40e_asq_cmd_details *cmd_details);
+enum i40e_status_code i40e_aq_set_vsi_full_promiscuous(struct i40e_hw *hw,
+ u16 seid, bool set,
+ struct i40e_asq_cmd_details *cmd_details);
enum i40e_status_code i40e_aq_set_vsi_mc_promisc_on_vlan(struct i40e_hw *hw,
u16 seid, bool enable, u16 vid,
struct i40e_asq_cmd_details *cmd_details);
--
2.4.11
^ permalink raw reply related
* [PATCH v3 18/31] net/i40e/base: implement clear all WoL filters
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
This patch implements the clear Wake on LAN (WoL) filters admin queue
function which clears out ALL WoL patterns programmed into
the flex filters.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_adminq_cmd.h | 1 +
drivers/net/i40e/base/i40e_common.c | 20 ++++++++++++++++++++
drivers/net/i40e/base/i40e_prototype.h | 2 ++
3 files changed, 23 insertions(+)
diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
index cef02b1..19af8b5 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -156,6 +156,7 @@ enum i40e_admin_queue_opc {
/* WoL commands */
i40e_aqc_opc_set_wol_filter = 0x0120,
i40e_aqc_opc_get_wake_reason = 0x0121,
+ i40e_aqc_opc_clear_all_wol_filters = 0x025E,
#endif
/* internal switch commands */
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 9f4b872..bae9079 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -6900,4 +6900,24 @@ enum i40e_status_code i40e_aq_get_wake_event_reason(struct i40e_hw *hw,
return status;
}
+/**
+* i40e_aq_clear_all_wol_filters
+* @hw: pointer to the hw struct
+* @cmd_details: pointer to command details structure or NULL
+*
+* Get information for the reason of a Wake Up event
+**/
+enum i40e_status_code i40e_aq_clear_all_wol_filters(struct i40e_hw *hw,
+ struct i40e_asq_cmd_details *cmd_details)
+{
+ struct i40e_aq_desc desc;
+ enum i40e_status_code status;
+
+ i40e_fill_default_direct_cmd_desc(&desc,
+ i40e_aqc_opc_clear_all_wol_filters);
+
+ status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
+
+ return status;
+}
#endif /* X722_SUPPORT */
diff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h
index 9109cfc..4de96b5 100644
--- a/drivers/net/i40e/base/i40e_prototype.h
+++ b/drivers/net/i40e/base/i40e_prototype.h
@@ -537,6 +537,8 @@ enum i40e_status_code i40e_aq_set_clear_wol_filter(struct i40e_hw *hw,
enum i40e_status_code i40e_aq_get_wake_event_reason(struct i40e_hw *hw,
u16 *wake_reason,
struct i40e_asq_cmd_details *cmd_details);
+enum i40e_status_code i40e_aq_clear_all_wol_filters(struct i40e_hw *hw,
+ struct i40e_asq_cmd_details *cmd_details);
#endif
enum i40e_status_code i40e_read_phy_register_clause22(struct i40e_hw *hw,
u16 reg, u8 phy_addr, u16 *value);
--
2.4.11
^ permalink raw reply related
* [PATCH v3 17/31] net/i40e/base: adjust 25G PHY type values
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
Define the values for the 25G PHY type bit-fields that match
reported values from firmware. There was a gap in the bit
fields but no corresponding gap i40e_aq_phy_type enum.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_type.h | 20 ++++++++++++++++----
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 8889fc7..206e95a 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -338,10 +338,22 @@ struct i40e_phy_info {
#define I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL \
BIT_ULL(I40E_PHY_TYPE_1000BASE_T_OPTICAL)
#define I40E_CAP_PHY_TYPE_20GBASE_KR2 BIT_ULL(I40E_PHY_TYPE_20GBASE_KR2)
-#define I40E_CAP_PHY_TYPE_25GBASE_KR BIT_ULL(I40E_AQ_PHY_TYPE_EXT_25G_KR + 32)
-#define I40E_CAP_PHY_TYPE_25GBASE_CR BIT_ULL(I40E_AQ_PHY_TYPE_EXT_25G_CR + 32)
-#define I40E_CAP_PHY_TYPE_25GBASE_SR BIT_ULL(I40E_AQ_PHY_TYPE_EXT_25G_SR + 32)
-#define I40E_CAP_PHY_TYPE_25GBASE_LR BIT_ULL(I40E_AQ_PHY_TYPE_EXT_25G_LR + 32)
+/*
+ * Defining the macro I40E_TYPE_OFFSET to implement a bit shift for some
+ * PHY types. There is an unused bit (31) in the I40E_CAP_PHY_TYPE_* bit
+ * fields but no corresponding gap in the i40e_aq_phy_type enumeration. So,
+ * a shift is needed to adjust for this with values larger than 31. The
+ * only affected values are I40E_PHY_TYPE_25GBASE_*.
+ */
+#define I40E_PHY_TYPE_OFFSET 1
+#define I40E_CAP_PHY_TYPE_25GBASE_KR BIT_ULL(I40E_PHY_TYPE_25GBASE_KR + \
+ I40E_PHY_TYPE_OFFSET)
+#define I40E_CAP_PHY_TYPE_25GBASE_CR BIT_ULL(I40E_PHY_TYPE_25GBASE_CR + \
+ I40E_PHY_TYPE_OFFSET)
+#define I40E_CAP_PHY_TYPE_25GBASE_SR BIT_ULL(I40E_PHY_TYPE_25GBASE_SR + \
+ I40E_PHY_TYPE_OFFSET)
+#define I40E_CAP_PHY_TYPE_25GBASE_LR BIT_ULL(I40E_PHY_TYPE_25GBASE_LR + \
+ I40E_PHY_TYPE_OFFSET)
#define I40E_HW_CAP_MAX_GPIO 30
#define I40E_HW_CAP_MDIO_PORT_MODE_MDIO 0
#define I40E_HW_CAP_MDIO_PORT_MODE_I2C 1
--
2.4.11
^ permalink raw reply related
* [PATCH v3 16/31] net/i40e/base: use BIT() macro instead of bit fields
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_adminq_cmd.h | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
index 1884758..cef02b1 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -1823,11 +1823,11 @@ struct i40e_aq_set_phy_config { /* same bits as above in all */
#define I40E_AQ_PHY_TYPE_EXT_25G_SR 0x04
#define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08
u8 fec_config;
-#define I40E_AQ_SET_FEC_ABILITY_KR (1 << 0)
-#define I40E_AQ_SET_FEC_ABILITY_RS (1 << 1)
-#define I40E_AQ_SET_FEC_REQUEST_KR (1 << 2)
-#define I40E_AQ_SET_FEC_REQUEST_RS (1 << 3)
-#define I40E_AQ_SET_FEC_AUTO (1 << 4)
+#define I40E_AQ_SET_FEC_ABILITY_KR BIT(0)
+#define I40E_AQ_SET_FEC_ABILITY_RS BIT(1)
+#define I40E_AQ_SET_FEC_REQUEST_KR BIT(2)
+#define I40E_AQ_SET_FEC_REQUEST_RS BIT(3)
+#define I40E_AQ_SET_FEC_AUTO BIT(4)
#define I40E_AQ_PHY_FEC_CONFIG_SHIFT 0x0
#define I40E_AQ_PHY_FEC_CONFIG_MASK (0x1F << I40E_AQ_PHY_FEC_CONFIG_SHIFT)
u8 reserved;
--
2.4.11
^ permalink raw reply related
* [PATCH v3 15/31] net/i40e/base: add FEC bits to PHY capabilities
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
Add FEC bits to the PHY capabilities AQ command struct. This is required
for 25GbE support. Change the name of the generic mod_type_ext field to
indicate that it is now used for handling FEC.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_adminq_cmd.h | 13 ++++++++++++-
drivers/net/i40e/base/i40e_common.c | 2 ++
drivers/net/i40e/i40e_ethdev.c | 2 +-
3 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
index 4f06772..1884758 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -1785,7 +1785,16 @@ struct i40e_aq_get_phy_abilities_resp {
#define I40E_AQ_PHY_TYPE_EXT_25G_CR 0X02
#define I40E_AQ_PHY_TYPE_EXT_25G_SR 0x04
#define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08
- u8 mod_type_ext;
+ u8 fec_cfg_curr_mod_ext_info;
+#define I40E_AQ_ENABLE_FEC_KR 0x01
+#define I40E_AQ_ENABLE_FEC_RS 0x02
+#define I40E_AQ_REQUEST_FEC_KR 0x04
+#define I40E_AQ_REQUEST_FEC_RS 0x08
+#define I40E_AQ_ENABLE_FEC_AUTO 0x10
+#define I40E_AQ_FEC
+#define I40E_AQ_MODULE_TYPE_EXT_MASK 0xE0
+#define I40E_AQ_MODULE_TYPE_EXT_SHIFT 5
+
u8 ext_comp_code;
u8 phy_id[4];
u8 module_type[3];
@@ -1819,6 +1828,8 @@ struct i40e_aq_set_phy_config { /* same bits as above in all */
#define I40E_AQ_SET_FEC_REQUEST_KR (1 << 2)
#define I40E_AQ_SET_FEC_REQUEST_RS (1 << 3)
#define I40E_AQ_SET_FEC_AUTO (1 << 4)
+#define I40E_AQ_PHY_FEC_CONFIG_SHIFT 0x0
+#define I40E_AQ_PHY_FEC_CONFIG_MASK (0x1F << I40E_AQ_PHY_FEC_CONFIG_SHIFT)
u8 reserved;
};
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index b9b0ee6..9f4b872 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -1800,6 +1800,8 @@ enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures,
config.eee_capability = abilities.eee_capability;
config.eeer = abilities.eeer_val;
config.low_power_ctrl = abilities.d3_lpan;
+ config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
+ I40E_AQ_PHY_FEC_CONFIG_MASK;
status = i40e_aq_set_phy_config(hw, &config, NULL);
if (status)
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 319761f..b2f827c 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -1629,7 +1629,7 @@ i40e_phy_conf_link(struct i40e_hw *hw,
/* use get_phy_abilities_resp value for the rest */
phy_conf.phy_type = phy_ab.phy_type;
phy_conf.phy_type_ext = phy_ab.phy_type_ext;
- phy_conf.fec_config = phy_ab.mod_type_ext;
+ phy_conf.fec_config = phy_ab.fec_cfg_curr_mod_ext_info;
phy_conf.eee_capability = phy_ab.eee_capability;
phy_conf.eeer = phy_ab.eeer_val;
phy_conf.low_power_ctrl = phy_ab.d3_lpan;
--
2.4.11
^ permalink raw reply related
* [PATCH v3 14/31] net/i40e/base: remove FPK HyperV VF device ID
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
Microsoft recently removed the requirement for VFs to use the VMBus.
The Fort Park Windows VF has been changed to use only the hardware
mailbox, so the Hyper-V VF device ID can be removed.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_common.c | 1 -
drivers/net/i40e/base/i40e_devids.h | 1 -
drivers/net/i40e/i40e_ethdev_vf.c | 1 -
3 files changed, 3 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index fda6c4a..b9b0ee6 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -87,7 +87,6 @@ STATIC enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw)
#ifdef X722_SUPPORT
#if defined(INTEGRATED_VF) || defined(VF_DRIVER)
case I40E_DEV_ID_X722_VF:
- case I40E_DEV_ID_X722_VF_HV:
#ifdef X722_A0_SUPPORT
case I40E_DEV_ID_X722_A0_VF:
#endif
diff --git a/drivers/net/i40e/base/i40e_devids.h b/drivers/net/i40e/base/i40e_devids.h
index 8bd5793..19bb376 100644
--- a/drivers/net/i40e/base/i40e_devids.h
+++ b/drivers/net/i40e/base/i40e_devids.h
@@ -70,7 +70,6 @@ POSSIBILITY OF SUCH DAMAGE.
#define I40E_DEV_ID_SFP_I_X722 0x37D3
#if defined(INTEGRATED_VF) || defined(VF_DRIVER) || defined(I40E_NDIS_SUPPORT)
#define I40E_DEV_ID_X722_VF 0x37CD
-#define I40E_DEV_ID_X722_VF_HV 0x37D9
#endif /* VF_DRIVER */
#endif /* X722_SUPPORT */
diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c
index 4a0caac..12da0ec 100644
--- a/drivers/net/i40e/i40e_ethdev_vf.c
+++ b/drivers/net/i40e/i40e_ethdev_vf.c
@@ -1087,7 +1087,6 @@ static const struct rte_pci_id pci_id_i40evf_map[] = {
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
- { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF_HV) },
{ .vendor_id = 0, /* sentinel */ },
};
--
2.4.11
^ permalink raw reply related
* [PATCH v3 13/31] net/i40e/base: deprecating unused macro
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
I40E_MAC_X710 was supposed to be for 10G and I40E_MAC_XL710
was supposed to be for 40G. But i40e_set_mac_type() sets
I40E_MAC_XL710 for all device IDS. I40E_MAC_X710 is not
used at all. Thus deprecating this extra macro.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_type.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 223f5fe..8889fc7 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -212,7 +212,6 @@ enum i40e_memcpy_type {
*/
enum i40e_mac_type {
I40E_MAC_UNKNOWN = 0,
- I40E_MAC_X710,
I40E_MAC_XL710,
I40E_MAC_VF,
#ifdef X722_SUPPORT
--
2.4.11
^ permalink raw reply related
* [PATCH v3 12/31] net/i40e/base: replace memcpy
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
To align with current memcpy use, replace existing legacy memcpy() calls
with i40e_memcpy() calls.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_common.c | 13 ++++++++-----
drivers/net/i40e/base/i40e_nvm.c | 7 ++++---
2 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index fbaa0be..fda6c4a 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -1126,7 +1126,8 @@ enum i40e_status_code i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);
if (flags & I40E_AQC_LAN_ADDR_VALID)
- memcpy(mac_addr, &addrs.pf_lan_mac, sizeof(addrs.pf_lan_mac));
+ i40e_memcpy(mac_addr, &addrs.pf_lan_mac, sizeof(addrs.pf_lan_mac),
+ I40E_NONDMA_TO_NONDMA);
return status;
}
@@ -1149,7 +1150,8 @@ enum i40e_status_code i40e_get_port_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
return status;
if (flags & I40E_AQC_PORT_ADDR_VALID)
- memcpy(mac_addr, &addrs.port_mac, sizeof(addrs.port_mac));
+ i40e_memcpy(mac_addr, &addrs.port_mac, sizeof(addrs.port_mac),
+ I40E_NONDMA_TO_NONDMA);
else
status = I40E_ERR_INVALID_MAC_ADDR;
@@ -1207,7 +1209,8 @@ enum i40e_status_code i40e_get_san_mac_addr(struct i40e_hw *hw,
return status;
if (flags & I40E_AQC_SAN_ADDR_VALID)
- memcpy(mac_addr, &addrs.pf_san_mac, sizeof(addrs.pf_san_mac));
+ i40e_memcpy(mac_addr, &addrs.pf_san_mac, sizeof(addrs.pf_san_mac),
+ I40E_NONDMA_TO_NONDMA);
else
status = I40E_ERR_INVALID_MAC_ADDR;
@@ -2760,8 +2763,8 @@ enum i40e_status_code i40e_update_link_info(struct i40e_hw *hw)
if (status)
return status;
- memcpy(hw->phy.link_info.module_type, &abilities.module_type,
- sizeof(hw->phy.link_info.module_type));
+ i40e_memcpy(hw->phy.link_info.module_type, &abilities.module_type,
+ sizeof(hw->phy.link_info.module_type), I40E_NONDMA_TO_NONDMA);
}
return status;
}
diff --git a/drivers/net/i40e/base/i40e_nvm.c b/drivers/net/i40e/base/i40e_nvm.c
index 4fa1220..eb69e49 100644
--- a/drivers/net/i40e/base/i40e_nvm.c
+++ b/drivers/net/i40e/base/i40e_nvm.c
@@ -1423,7 +1423,8 @@ STATIC enum i40e_status_code i40e_nvmupd_exec_aq(struct i40e_hw *hw,
if (hw->nvm_buff.va) {
buff = hw->nvm_buff.va;
- memcpy(buff, &bytes[aq_desc_len], aq_data_len);
+ i40e_memcpy(buff, &bytes[aq_desc_len], aq_data_len,
+ I40E_NONDMA_TO_NONDMA);
}
}
@@ -1496,7 +1497,7 @@ STATIC enum i40e_status_code i40e_nvmupd_get_aq_result(struct i40e_hw *hw,
__func__, cmd->offset, cmd->offset + len);
buff = ((u8 *)&hw->nvm_wb_desc) + cmd->offset;
- memcpy(bytes, buff, len);
+ i40e_memcpy(bytes, buff, len, I40E_NONDMA_TO_NONDMA);
bytes += len;
remainder -= len;
@@ -1510,7 +1511,7 @@ STATIC enum i40e_status_code i40e_nvmupd_get_aq_result(struct i40e_hw *hw,
i40e_debug(hw, I40E_DEBUG_NVM, "%s: databuf bytes %d to %d\n",
__func__, start_byte, start_byte + remainder);
- memcpy(bytes, buff, remainder);
+ i40e_memcpy(bytes, buff, remainder, I40E_NONDMA_TO_NONDMA);
}
return I40E_SUCCESS;
--
2.4.11
^ permalink raw reply related
* [PATCH v3 10/31] net/i40e/base: add protocols when discover capabilities
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
Add logical_id to I40E_AQ_CAP_ID_MNG_MODE capability starting from major
version 2.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_common.c | 8 ++++++++
drivers/net/i40e/base/i40e_type.h | 4 ++++
2 files changed, 12 insertions(+)
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 85c1c11..9591428 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -3611,6 +3611,14 @@ STATIC void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
break;
case I40E_AQ_CAP_ID_MNG_MODE:
p->management_mode = number;
+ if (major_rev > 1) {
+ p->mng_protocols_over_mctp = logical_id;
+ i40e_debug(hw, I40E_DEBUG_INIT,
+ "HW Capability: Protocols over MCTP = %d\n",
+ p->mng_protocols_over_mctp);
+ } else {
+ p->mng_protocols_over_mctp = 0;
+ }
i40e_debug(hw, I40E_DEBUG_INIT,
"HW Capability: Management Mode = %d\n",
p->management_mode);
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 530ee5e..223f5fe 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -366,6 +366,10 @@ struct i40e_hw_capabilities {
#define I40E_NVM_IMAGE_TYPE_UDP_CLOUD 0x3
u32 management_mode;
+ u32 mng_protocols_over_mctp;
+#define I40E_MNG_PROTOCOL_PLDM 0x2
+#define I40E_MNG_PROTOCOL_OEM_COMMANDS 0x4
+#define I40E_MNG_PROTOCOL_NCSI 0x8
u32 npar_enable;
u32 os2bmc;
u32 valid_functions;
--
2.4.11
^ permalink raw reply related
* [PATCH v3 09/31] net/i40e/base: add bus number info
From: Jingjing Wu @ 2016-12-10 11:24 UTC (permalink / raw)
To: dev; +Cc: jingjing.wu, helin.zhang
In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com>
Currently i40e_bus_info has PCI device and function info only. However
in log messages slot number (i.e hw->bus.device) is being printed
as bus number. Another field should be added to provide bus number
info and preserve existing information.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
---
drivers/net/i40e/base/i40e_type.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 5a59ce2..530ee5e 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -561,6 +561,7 @@ struct i40e_bus_info {
u16 func;
u16 device;
u16 lan_id;
+ u16 bus_id;
};
/* Flow control (FC) parameters */
--
2.4.11
^ permalink raw reply related
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