* [PATCH v1 05/17] net/dpaa/fmlib: add null check in scheme delete
From: Hemant Agrawal @ 2026-06-18 14:11 UTC (permalink / raw)
To: stephen, david.marchand, dev; +Cc: stable, Prashant Gupta
In-Reply-To: <20260618141151.3990283-1-hemant.agrawal@nxp.com>
From: Prashant Gupta <prashant.gupta_3@nxp.com>
Add a null pointer check before dereferencing the scheme handle
in FM_PCD_MatchTableSchemeDelete() to prevent potential null
pointer dereference.
Fixes: 663ff698e3 ("net/dpaa: support VSP in fmlib")
Cc: stable@dpdk.org
Signed-off-by: Prashant Gupta <prashant.gupta_3@nxp.com>
---
drivers/net/dpaa/fmlib/fm_lib.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/dpaa/fmlib/fm_lib.c b/drivers/net/dpaa/fmlib/fm_lib.c
index b35feba004..65a818372e 100644
--- a/drivers/net/dpaa/fmlib/fm_lib.c
+++ b/drivers/net/dpaa/fmlib/fm_lib.c
@@ -305,6 +305,9 @@ fm_pcd_kg_scheme_delete(t_handle h_scheme)
_fml_dbg("Calling...");
+ if (p_dev == NULL)
+ return E_NO_DEVICE;
+
p_pcd_dev = (t_device *)p_dev->h_user_priv;
id.obj = UINT_TO_PTR(p_dev->id);
--
2.43.0
^ permalink raw reply related
* [PATCH v1 04/17] net/dpaa: fix modify cgr to use index
From: Hemant Agrawal @ 2026-06-18 14:11 UTC (permalink / raw)
To: stephen, david.marchand, dev; +Cc: stable
In-Reply-To: <20260618141151.3990283-1-hemant.agrawal@nxp.com>
In dpaa_modify_cgr(), the code was always using the pointer to
the first CGR element instead of indexing by the queue index.
Fix it to use the correct CGR entry by index.
Fixes: 62f53995ca ("net/dpaa: add frame count based tail drop with CGR")
Cc: stable@dpdk.org
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa/dpaa_ethdev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 9f976d179b..424458857e 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -1304,7 +1304,7 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
rxq->nb_desc = nb_desc;
/* Enable tail drop with cgr on this queue */
qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, nb_desc, 0);
- ret = qman_modify_cgr(dpaa_intf->cgr_rx, 0, &cgr_opts);
+ ret = qman_modify_cgr(&dpaa_intf->cgr_rx[queue_idx], 0, &cgr_opts);
if (ret) {
DPAA_PMD_WARN(
"rx taildrop modify fail on fqid %d (ret=%d)",
--
2.43.0
^ permalink raw reply related
* [PATCH v1 03/17] bus/dpaa: fix error handling in qman_query
From: Hemant Agrawal @ 2026-06-18 14:11 UTC (permalink / raw)
To: stephen, david.marchand, dev; +Cc: stable
In-Reply-To: <20260618141151.3990283-1-hemant.agrawal@nxp.com>
Optimize error handling in qman_query() to avoid redundant
checks and properly propagate error codes.
Fixes: 06268e2cb1 ("bus/dpaa: query queue frame count support")
Cc: stable@dpdk.org
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/dpaa/base/qbman/qman.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/bus/dpaa/base/qbman/qman.c b/drivers/bus/dpaa/base/qbman/qman.c
index 2da1b3e3f7..d289df2d33 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -1955,11 +1955,11 @@ int qman_query_fq(struct qman_fq *fq, struct qm_fqd *fqd)
cpu_relax();
DPAA_ASSERT((mcr->verb & QM_MCR_VERB_MASK) == QM_MCR_VERB_QUERYFQ);
res = mcr->result;
- if (res == QM_MCR_RESULT_OK)
- *fqd = mcr->queryfq.fqd;
- hw_fqd_to_cpu(fqd);
if (res != QM_MCR_RESULT_OK)
return -EIO;
+
+ *fqd = mcr->queryfq.fqd;
+ hw_fqd_to_cpu(fqd);
return 0;
}
--
2.43.0
^ permalink raw reply related
* [PATCH v1 02/17] bus/dpaa: fix fqid endianness
From: Hemant Agrawal @ 2026-06-18 14:11 UTC (permalink / raw)
To: stephen, david.marchand, dev; +Cc: stable
In-Reply-To: <20260618141151.3990283-1-hemant.agrawal@nxp.com>
In qman_fq_flow_control(), the fqid field in the management
command was set using the host-endian fqid instead of the
pre-converted big-endian fqid_be. Fix it to use fqid_be
consistent with all other enqueue paths.
Fixes: c47ff048b9 ("bus/dpaa: add QMAN driver core routines")
Cc: stable@dpdk.org
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/dpaa/base/qbman/qman.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/bus/dpaa/base/qbman/qman.c b/drivers/bus/dpaa/base/qbman/qman.c
index 9a99eb9785..2da1b3e3f7 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -1921,7 +1921,7 @@ int qman_fq_flow_control(struct qman_fq *fq, int xon)
goto out;
}
mcc = qm_mc_start(&p->p);
- mcc->alterfq.fqid = fq->fqid;
+ mcc->alterfq.fqid = fq->fqid_be;
mcc->alterfq.count = 0;
myverb = xon ? QM_MCC_VERB_ALTER_FQXON : QM_MCC_VERB_ALTER_FQXOFF;
--
2.43.0
^ permalink raw reply related
* [PATCH v1 01/17] bus/dpaa: fix error handling of qman_create_fq
From: Hemant Agrawal @ 2026-06-18 14:11 UTC (permalink / raw)
To: stephen, david.marchand, dev; +Cc: stable
In-Reply-To: <20260618141151.3990283-1-hemant.agrawal@nxp.com>
Fix the error handling path in qman_create_fq() to properly
return error codes instead of silently ignoring failures.
Fixes: c47ff048b9 ("bus/dpaa: add QMAN driver core routines")
Cc: stable@dpdk.org
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/dpaa/base/qbman/qman.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/bus/dpaa/base/qbman/qman.c b/drivers/bus/dpaa/base/qbman/qman.c
index 5534e1846c..9a99eb9785 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -1579,6 +1579,9 @@ int qman_create_fq(u32 fqid, u32 flags, struct qman_fq *fq)
err:
if (flags & QMAN_FQ_FLAG_DYNAMIC_FQID)
qman_release_fqid(fqid);
+#ifdef CONFIG_FSL_QMAN_FQ_LOOKUP
+ clear_fq_table_entry(fq->key);
+#endif
return -EIO;
}
--
2.43.0
^ permalink raw reply related
* [PATCH v1 00/17] net/dpaa: bug fixes for bus, net and fmlib drivers
From: Hemant Agrawal @ 2026-06-18 14:11 UTC (permalink / raw)
To: stephen, david.marchand, dev
This series contains bug fixes for the DPAA PMD (bus/dpaa, net/dpaa,
net/dpaa/fmlib and dma/dpaa):
- Fix error handling in qman_create_fq and qman_query
- Fix fqid endianness in qman_fq_flow_control
- Fix CGR index usage in dpaa_modify_cgr
- Add null check in fmlib scheme delete
- Fix BMI RX stats register offset
- Fix file descriptor leak after CCSR mmap
- Fix device probe regression on LS1043A
- Fix double-close in device remove path
- Fix incorrect condition in interrupt unregister
- Fix Coverity-reported issues in dpaa_flow and dpaa_qdma
- Fix xstat name for tx undersized counter
- Fix xstat string typos in BMI stats table
- Remove duplicate ptype entries
- Fix wrong buffer in xstats get by id
- Fix null l3_len check in checksum offload
- Fix mbuf leak in SG fd creation
All patches are bug fixes tagged with Fixes: and Cc: stable@dpdk.org.
Gagandeep Singh (3):
bus/dpaa: fix device probe issue
net/dpaa: fix device remove
net/dpaa: fix invalid check on interrupt unregister
Hemant Agrawal (11):
bus/dpaa: fix error handling of qman_create_fq
bus/dpaa: fix fqid endianness
bus/dpaa: fix error handling in qman_query
net/dpaa: fix modify cgr to use index
bus/dpaa: fix fd leak for ccsr mmap
net/dpaa: fix xstat name for tx undersized counter
net/dpaa: fix xstat string typos in BMI stats table
net/dpaa: remove duplicate ptype entries
net/dpaa: fix wrong buffer in xstats get by id
net/dpaa: fix null l3_len check in checksum offload
net/dpaa: fix mbuf leak in SG fd creation
Jun Yang (1):
bus/dpaa: fix BMI RX stats register offset
Prashant Gupta (1):
net/dpaa/fmlib: add null check in scheme delete
Vanshika Shukla (1):
net/dpaa: fix coverity reported issues
drivers/bus/dpaa/base/qbman/bman_driver.c | 3 ++-
drivers/bus/dpaa/base/qbman/qman.c | 11 +++++----
drivers/bus/dpaa/base/qbman/qman_driver.c | 6 ++---
drivers/bus/dpaa/dpaa_bus.c | 6 ++---
drivers/bus/dpaa/include/fman.h | 6 ++---
drivers/dma/dpaa/dpaa_qdma.c | 7 +++++-
drivers/net/dpaa/dpaa_ethdev.c | 27 +++++++++++------------
drivers/net/dpaa/dpaa_flow.c | 4 ++++
drivers/net/dpaa/dpaa_rxtx.c | 3 +++
drivers/net/dpaa/fmlib/fm_lib.c | 3 +++
10 files changed, 46 insertions(+), 30 deletions(-)
--
2.43.0
^ permalink raw reply
* [PATCH v2 7/7] net/intel: support header split mbuf callback
From: Dawid Wesierski @ 2026-06-18 14:38 UTC (permalink / raw)
To: dev; +Cc: thomas, david.marchand, Marek Kasiewicz, Dawid Wesierski
In-Reply-To: <20260618143837.310156-1-dawid.wesierski@intel.com>
From: Marek Kasiewicz <marek.kasiewicz@intel.com>
Wire the new ethdev header split mbuf callback API into the ICE PMD.
A new dev_ops hook, hdrs_mbuf_set_cb, lets applications register a
callback (and private context) on a receive queue; the callback returns
a payload buffer (virtual address and IOVA) that overrides the default
mempool-backed payload mbuf for header split RX.
The callback is invoked at three allocation points in the ICE driver:
- initial queue setup (ice_alloc_rx_queue_mbufs),
- bulk buffer allocation (ice_rx_alloc_bufs),
- single-packet receive path (ice_recv_pkts).
This enables zero-copy RX for header split: the NIC DMAs the payload
directly into application-managed buffers (e.g., mapped frame buffers
with known IOVA), bypassing an extra memcpy from the mempool mbuf.
Depends on: "ethdev: add header split mbuf callback API"
Signed-off-by: Marek Kasiewicz <marek.kasiewicz@intel.com>
Signed-off-by: Dawid Wesierski <dawid.wesierski@intel.com>
---
drivers/net/intel/common/rx.h | 2 +
drivers/net/intel/ice/ice_ethdev.c | 1 +
drivers/net/intel/ice/ice_rxtx.c | 63 ++++++++++++++++++++++++++++++
drivers/net/intel/ice/ice_rxtx.h | 2 +
4 files changed, 68 insertions(+)
diff --git a/drivers/net/intel/common/rx.h b/drivers/net/intel/common/rx.h
index e0bf520ebd..8abb2a3ce9 100644
--- a/drivers/net/intel/common/rx.h
+++ b/drivers/net/intel/common/rx.h
@@ -113,6 +113,8 @@ struct ci_rx_queue {
uint32_t hw_time_low; /* low 32 bits of timestamp */
int ts_offset; /* dynamic mbuf timestamp field offset */
uint64_t ts_flag; /* dynamic mbuf timestamp flag */
+ rte_eth_hdrs_mbuf_callback_fn hdrs_mbuf_cb; /* hdr split mbuf cb */
+ void *hdrs_mbuf_cb_priv; /* hdr split mbuf cb priv */
};
struct { /* iavf specific values */
const struct iavf_rxq_ops *ops; /**< queue ops */
diff --git a/drivers/net/intel/ice/ice_ethdev.c b/drivers/net/intel/ice/ice_ethdev.c
index ad9c49b339..353da8f2bd 100644
--- a/drivers/net/intel/ice/ice_ethdev.c
+++ b/drivers/net/intel/ice/ice_ethdev.c
@@ -282,6 +282,7 @@ static const struct eth_dev_ops ice_eth_dev_ops = {
.dev_set_link_down = ice_dev_set_link_down,
.dev_led_on = ice_dev_led_on,
.dev_led_off = ice_dev_led_off,
+ .hdrs_mbuf_set_cb = ice_hdrs_mbuf_set_cb,
.rx_queue_start = ice_rx_queue_start,
.rx_queue_stop = ice_rx_queue_stop,
.tx_queue_start = ice_tx_queue_start,
diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c
index 8d709125f7..867f595291 100644
--- a/drivers/net/intel/ice/ice_rxtx.c
+++ b/drivers/net/intel/ice/ice_rxtx.c
@@ -487,6 +487,17 @@ ice_alloc_rx_queue_mbufs(struct ci_rx_queue *rxq)
return -ENOMEM;
}
+ if (rxq->hdrs_mbuf_cb) {
+ struct rte_eth_hdrs_mbuf hdrs_mbuf = {0};
+ int ret = rxq->hdrs_mbuf_cb(rxq->hdrs_mbuf_cb_priv,
+ &hdrs_mbuf);
+
+ if (ret >= 0) {
+ mbuf_pay->buf_addr = hdrs_mbuf.buf_addr;
+ mbuf_pay->buf_iova = hdrs_mbuf.buf_iova;
+ }
+ }
+
mbuf_pay->next = NULL;
mbuf_pay->data_off = RTE_PKTMBUF_HEADROOM;
mbuf_pay->nb_segs = 1;
@@ -2126,6 +2137,16 @@ ice_rx_alloc_bufs(struct ci_rx_queue *rxq)
rxdp[i].read.pkt_addr = dma_addr;
} else {
mb->next = rxq->sw_split_buf[i].mbuf;
+ if (rxq->hdrs_mbuf_cb && mb->next) {
+ struct rte_eth_hdrs_mbuf hdrs_mbuf = {0};
+ int ret = rxq->hdrs_mbuf_cb(rxq->hdrs_mbuf_cb_priv,
+ &hdrs_mbuf);
+
+ if (ret >= 0) {
+ mb->next->buf_addr = hdrs_mbuf.buf_addr;
+ mb->next->buf_iova = hdrs_mbuf.buf_iova;
+ }
+ }
pay_addr = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mb->next));
rxdp[i].read.hdr_addr = dma_addr;
rxdp[i].read.pkt_addr = pay_addr;
@@ -2810,6 +2831,17 @@ ice_recv_pkts(void *rx_queue,
break;
}
+ if (rxq->hdrs_mbuf_cb) {
+ struct rte_eth_hdrs_mbuf hdrs_mbuf = {0};
+ int ret = rxq->hdrs_mbuf_cb(rxq->hdrs_mbuf_cb_priv,
+ &hdrs_mbuf);
+
+ if (ret >= 0) {
+ nmb_pay->buf_addr = hdrs_mbuf.buf_addr;
+ nmb_pay->buf_iova = hdrs_mbuf.buf_iova;
+ }
+ }
+
nmb->next = nmb_pay;
nmb_pay->next = NULL;
@@ -4533,3 +4565,34 @@ ice_fdir_programming(struct ice_pf *pf, struct ice_fltr_desc *fdir_desc)
}
+
+int
+ice_hdrs_mbuf_set_cb(struct rte_eth_dev *dev, uint16_t rx_queue_id,
+ void *priv, rte_eth_hdrs_mbuf_callback_fn cb)
+{
+ struct ci_rx_queue *rxq;
+
+ if (rx_queue_id >= dev->data->nb_rx_queues) {
+ PMD_DRV_LOG(ERR, "RX queue %u out of range", rx_queue_id);
+ return -EINVAL;
+ }
+
+ rxq = dev->data->rx_queues[rx_queue_id];
+ if (rxq == NULL) {
+ PMD_DRV_LOG(ERR, "RX queue %u not available or setup", rx_queue_id);
+ return -EINVAL;
+ }
+
+ if (rxq->hdrs_mbuf_cb) {
+ PMD_DRV_LOG(ERR, "RX queue %u has hdrs mbuf cb already",
+ rx_queue_id);
+ return -EEXIST;
+ }
+
+ rxq->hdrs_mbuf_cb_priv = priv;
+ rxq->hdrs_mbuf_cb = cb;
+ PMD_DRV_LOG(NOTICE, "RX queue %u register hdrs mbuf cb at %p",
+ rx_queue_id, cb);
+
+ return 0;
+}
diff --git a/drivers/net/intel/ice/ice_rxtx.h b/drivers/net/intel/ice/ice_rxtx.h
index 999b6b30d6..7ed114ee94 100644
--- a/drivers/net/intel/ice/ice_rxtx.h
+++ b/drivers/net/intel/ice/ice_rxtx.h
@@ -303,6 +303,8 @@ uint16_t ice_xmit_pkts_vec_avx512_offload(void *tx_queue,
int ice_fdir_programming(struct ice_pf *pf, struct ice_fltr_desc *fdir_desc);
int ice_tx_done_cleanup(void *txq, uint32_t free_cnt);
int ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc);
+int ice_hdrs_mbuf_set_cb(struct rte_eth_dev *dev, uint16_t rx_queue_id,
+ void *priv, rte_eth_hdrs_mbuf_callback_fn cb);
enum rte_vect_max_simd ice_get_max_simd_bitwidth(void);
#define FDIR_PARSING_ENABLE_PER_QUEUE(ad, on) do { \
--
2.47.3
---------------------------------------------------------------------
Intel Technology Poland sp. z o.o.
ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN.
Spolka oswiadcza, ze posiada status duzego przedsiebiorcy w rozumieniu ustawy z dnia 8 marca 2013 r. o przeciwdzialaniu nadmiernym opoznieniom w transakcjach handlowych.
Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione.
This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.
^ permalink raw reply related
* [PATCH v2 6/7] net/iavf: disable runtime queue setup capability
From: Dawid Wesierski @ 2026-06-18 14:38 UTC (permalink / raw)
To: dev; +Cc: thomas, david.marchand, Marek Kasiewicz, Dawid Wesierski
In-Reply-To: <20260618143837.310156-1-dawid.wesierski@intel.com>
From: Marek Kasiewicz <marek.kasiewicz@intel.com>
Remove the advertisement of RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP
and RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP capabilities from the
iavf VF driver.
Runtime queue setup on E810 VFs causes queue state corruption when
queues are dynamically reconfigured while the hardware rate limiter
is actively pacing TX queues. Queue configuration messages to the PF
via virtchnl can race with ongoing TX operations, leading to undefined
behavior.
By not advertising these capabilities, all queues are configured at
port start and remain stable throughout the port lifecycle.
Signed-off-by: Marek Kasiewicz <marek.kasiewicz@intel.com>
Signed-off-by: Dawid Wesierski <dawid.wesierski@intel.com>
---
drivers/net/intel/iavf/iavf_ethdev.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/net/intel/iavf/iavf_ethdev.c b/drivers/net/intel/iavf/iavf_ethdev.c
index ec1ad02826..ab223e6afd 100644
--- a/drivers/net/intel/iavf/iavf_ethdev.c
+++ b/drivers/net/intel/iavf/iavf_ethdev.c
@@ -1160,9 +1160,6 @@ iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
dev_info->reta_size = vf->vf_res->rss_lut_size;
dev_info->flow_type_rss_offloads = IAVF_RSS_OFFLOAD_ALL;
dev_info->max_mac_addrs = IAVF_NUM_MACADDR_MAX;
- dev_info->dev_capa =
- RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP |
- RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP;
dev_info->rx_offload_capa =
RTE_ETH_RX_OFFLOAD_VLAN_STRIP |
RTE_ETH_RX_OFFLOAD_QINQ_STRIP |
--
2.47.3
---------------------------------------------------------------------
Intel Technology Poland sp. z o.o.
ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN.
Spolka oswiadcza, ze posiada status duzego przedsiebiorcy w rozumieniu ustawy z dnia 8 marca 2013 r. o przeciwdzialaniu nadmiernym opoznieniom w transakcjach handlowych.
Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione.
This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.
^ permalink raw reply related
* [PATCH v2 5/7] net/ice: timestamp all received packets when PTP is enabled
From: Dawid Wesierski @ 2026-06-18 14:38 UTC (permalink / raw)
To: dev; +Cc: thomas, david.marchand, Marek Kasiewicz, Dawid Wesierski
In-Reply-To: <20260618143837.310156-1-dawid.wesierski@intel.com>
From: Marek Kasiewicz <marek.kasiewicz@intel.com>
When PTP is enabled on the ICE PMD, hardware RX timestamps are only
applied to packets classified as IEEE 1588 (Ethertype 0x88F7). This
prevents applications from obtaining hardware timestamps on regular
UDP/IP traffic.
Remove the TIMESYNC packet type filter so that all received packets
get hardware timestamps when PTP is enabled. This is required for
time-sensitive networking applications that need per-packet arrival
timing on media traffic, such as ST 2110-21 receiver compliance
monitoring.
The change affects all three RX paths: scan, scattered, and single
packet receive functions.
Signed-off-by: Marek Kasiewicz <marek.kasiewicz@intel.com>
Signed-off-by: Dawid Wesierski <dawid.wesierski@intel.com>
---
drivers/net/intel/ice/ice_rxtx.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c
index c4b5454c53..8d709125f7 100644
--- a/drivers/net/intel/ice/ice_rxtx.c
+++ b/drivers/net/intel/ice/ice_rxtx.c
@@ -2023,8 +2023,7 @@ ice_rx_scan_hw_ring(struct ci_rx_queue *rxq)
pkt_flags |= rxq->ts_flag;
}
- if (ad->ptp_ena && ((mb->packet_type &
- RTE_PTYPE_L2_MASK) == RTE_PTYPE_L2_ETHER_TIMESYNC)) {
+ if (ad->ptp_ena) {
rxq->time_high =
rte_le_to_cpu_32(rxdp[j].wb.flex_ts.ts_high);
mb->timesync = rxq->queue_id;
@@ -2390,8 +2389,7 @@ ice_recv_scattered_pkts(void *rx_queue,
pkt_flags |= rxq->ts_flag;
}
- if (ad->ptp_ena && ((first_seg->packet_type & RTE_PTYPE_L2_MASK)
- == RTE_PTYPE_L2_ETHER_TIMESYNC)) {
+ if (ad->ptp_ena) {
rxq->time_high =
rte_le_to_cpu_32(rxd.wb.flex_ts.ts_high);
first_seg->timesync = rxq->queue_id;
@@ -2881,8 +2879,7 @@ ice_recv_pkts(void *rx_queue,
pkt_flags |= rxq->ts_flag;
}
- if (ad->ptp_ena && ((rxm->packet_type & RTE_PTYPE_L2_MASK) ==
- RTE_PTYPE_L2_ETHER_TIMESYNC)) {
+ if (ad->ptp_ena) {
rxq->time_high =
rte_le_to_cpu_32(rxd.wb.flex_ts.ts_high);
rxm->timesync = rxq->queue_id;
--
2.47.3
---------------------------------------------------------------------
Intel Technology Poland sp. z o.o.
ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN.
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* [PATCH v2 4/7] net/ice/base: reduce default scheduler burst size
From: Dawid Wesierski @ 2026-06-18 14:38 UTC (permalink / raw)
To: dev; +Cc: thomas, david.marchand, Marek Kasiewicz, Dawid Wesierski
In-Reply-To: <20260618143837.310156-1-dawid.wesierski@intel.com>
From: Marek Kasiewicz <marek.kasiewicz@intel.com>
Reduce ICE_SCHED_DFLT_BURST_SIZE from 15 KB to 2 KB to improve
TX rate limiter granularity. The E810 TX scheduler uses a token
bucket algorithm where the burst size controls the maximum bytes
sent in a single burst before the rate limiter throttles.
A 15 KB burst allows micro-bursts of ~10 max-size frames, which
violates tight inter-packet spacing requirements in time-sensitive
networking applications such as SMPTE ST 2110-21 narrow-sender
compliance. Reducing to 2 KB forces near-constant-rate output
matching the configured shaper profile.
Signed-off-by: Marek Kasiewicz <marek.kasiewicz@intel.com>
Signed-off-by: Dawid Wesierski <dawid.wesierski@intel.com>
---
drivers/net/intel/ice/base/ice_type.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/intel/ice/base/ice_type.h b/drivers/net/intel/ice/base/ice_type.h
index 6d8c187689..39569ff3e3 100644
--- a/drivers/net/intel/ice/base/ice_type.h
+++ b/drivers/net/intel/ice/base/ice_type.h
@@ -1100,7 +1100,7 @@ enum ice_rl_type {
#define ICE_SCHED_NO_SHARED_RL_PROF_ID 0xFFFF
#define ICE_SCHED_DFLT_BW_WT 4
#define ICE_SCHED_INVAL_PROF_ID 0xFFFF
-#define ICE_SCHED_DFLT_BURST_SIZE (15 * 1024) /* in bytes (15k) */
+#define ICE_SCHED_DFLT_BURST_SIZE (2 * 1024) /* in bytes (2k) */
/* Access Macros for Tx Sched RL Profile data */
#define ICE_TXSCHED_GET_RL_PROF_ID(p) LE16_TO_CPU((p)->info.profile_id)
--
2.47.3
---------------------------------------------------------------------
Intel Technology Poland sp. z o.o.
ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN.
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* [PATCH v2 3/7] net/iavf: allow runtime queue rate limit configuration
From: Dawid Wesierski @ 2026-06-18 14:38 UTC (permalink / raw)
To: dev; +Cc: thomas, david.marchand, Marek Kasiewicz, Dawid Wesierski
In-Reply-To: <20260618143837.310156-1-dawid.wesierski@intel.com>
From: Marek Kasiewicz <marek.kasiewicz@intel.com>
Allow per-queue bandwidth rate limiting to be configured without
stopping the port when only a single TC node and single QoS element
are involved. This enables dynamic session management where individual
queue pacing rates can be changed while other queues continue
transmitting.
Also fix the queue ID assignment in the bandwidth configuration to
use the actual TM node ID rather than a sequential counter index, and
only mark the TM hierarchy as committed when the port is stopped to
permit subsequent reconfiguration.
Signed-off-by: Marek Kasiewicz <marek.kasiewicz@intel.com>
Signed-off-by: Dawid Wesierski <dawid.wesierski@intel.com>
---
drivers/net/intel/iavf/iavf_tm.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/net/intel/iavf/iavf_tm.c b/drivers/net/intel/iavf/iavf_tm.c
index 1cf7bfb106..43d7a44337 100644
--- a/drivers/net/intel/iavf/iavf_tm.c
+++ b/drivers/net/intel/iavf/iavf_tm.c
@@ -804,8 +804,10 @@ static int iavf_hierarchy_commit(struct rte_eth_dev *dev,
int index = 0, node_committed = 0;
int i, ret_val = IAVF_SUCCESS;
- /* check if port is stopped */
- if (adapter->stopped != 1) {
+ /* check if port is stopped, except for setting queue bandwidth */
+ if (vf->tm_conf.nb_tc_node != 1 &&
+ vf->qos_cap->num_elem != 1 &&
+ adapter->stopped != 1) {
PMD_DRV_LOG(ERR, "Please stop port first");
ret_val = IAVF_ERR_NOT_READY;
goto err;
@@ -856,7 +858,7 @@ static int iavf_hierarchy_commit(struct rte_eth_dev *dev,
q_tc_mapping->tc[tm_node->tc].req.queue_count++;
if (tm_node->shaper_profile) {
- q_bw->cfg[node_committed].queue_id = node_committed;
+ q_bw->cfg[node_committed].queue_id = tm_node->id;
q_bw->cfg[node_committed].shaper.peak =
tm_node->shaper_profile->profile.peak.rate /
1000 * IAVF_BITS_PER_BYTE;
@@ -900,7 +902,8 @@ static int iavf_hierarchy_commit(struct rte_eth_dev *dev,
goto fail_clear;
vf->qtc_map = qtc_map;
- vf->tm_conf.committed = true;
+ if (adapter->stopped == 1)
+ vf->tm_conf.committed = true;
return ret_val;
fail_clear:
--
2.47.3
---------------------------------------------------------------------
Intel Technology Poland sp. z o.o.
ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN.
Spolka oswiadcza, ze posiada status duzego przedsiebiorcy w rozumieniu ustawy z dnia 8 marca 2013 r. o przeciwdzialaniu nadmiernym opoznieniom w transakcjach handlowych.
Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione.
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* [PATCH v2 2/7] net/iavf: increase max ring descriptors to hardware limit
From: Dawid Wesierski @ 2026-06-18 14:38 UTC (permalink / raw)
To: dev; +Cc: thomas, david.marchand, Marek Kasiewicz, Dawid Wesierski
In-Reply-To: <20260618143837.310156-1-dawid.wesierski@intel.com>
From: Marek Kasiewicz <marek.kasiewicz@intel.com>
The Intel E810 hardware supports up to 8160 (8K - 32) descriptors per
TX/RX ring, but IAVF_MAX_RING_DESC caps it at 4096. Applications that
need deep descriptor rings for hardware rate-limited pacing (e.g.,
ST2110 video with thousands of packets per frame) cannot queue enough
packets before the pacing epoch begins.
Increase IAVF_MAX_RING_DESC to the hardware maximum of 8160 to allow
full utilization of the ring depth on E810 VFs.
Signed-off-by: Marek Kasiewicz <marek.kasiewicz@intel.com>
Signed-off-by: Dawid Wesierski <dawid.wesierski@intel.com>
---
drivers/net/intel/iavf/iavf_rxtx.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/intel/iavf/iavf_rxtx.h b/drivers/net/intel/iavf/iavf_rxtx.h
index 8449236d4d..22ea415f44 100644
--- a/drivers/net/intel/iavf/iavf_rxtx.h
+++ b/drivers/net/intel/iavf/iavf_rxtx.h
@@ -16,7 +16,7 @@
/* In QLEN must be whole number of 32 descriptors. */
#define IAVF_ALIGN_RING_DESC 32
#define IAVF_MIN_RING_DESC 64
-#define IAVF_MAX_RING_DESC 4096
+#define IAVF_MAX_RING_DESC (8192 - 32)
#define IAVF_DMA_MEM_ALIGN 4096
/* Base address of the HW descriptor ring should be 128B aligned. */
#define IAVF_RING_BASE_ALIGN 128
--
2.47.3
---------------------------------------------------------------------
Intel Technology Poland sp. z o.o.
ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN.
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* [PATCH v2 1/7] ethdev: add header split mbuf callback API
From: Dawid Wesierski @ 2026-06-18 14:38 UTC (permalink / raw)
To: dev; +Cc: thomas, david.marchand, Marek Kasiewicz, Dawid Wesierski
In-Reply-To: <20260618143837.310156-1-dawid.wesierski@intel.com>
From: Marek Kasiewicz <marek.kasiewicz@intel.com>
Add rte_eth_hdrs_set_mbuf_callback() that allows applications to
register a callback providing custom payload mbufs for header split RX
mode. When registered, a PMD that supports header split is expected to
call this callback at mbuf allocation points to obtain user-provided
payload buffers instead of allocating from the mempool.
This enables zero-copy RX for header split: the NIC DMAs the payload
directly into application-managed buffers (e.g., mapped frame buffers
with known IOVA), bypassing an extra memcpy from the mempool mbuf.
A new struct rte_eth_hdrs_mbuf describes the payload buffer (virtual
address and IOVA), and the new dev_ops hook hdrs_mbuf_set_cb lets each
PMD wire the callback to its receive queue state.
The API is marked experimental and exported with version 26.07.
Signed-off-by: Marek Kasiewicz <marek.kasiewicz@intel.com>
Signed-off-by: Dawid Wesierski <dawid.wesierski@intel.com>
---
lib/ethdev/ethdev_driver.h | 10 +++++++++
lib/ethdev/rte_ethdev.c | 17 ++++++++++++++
lib/ethdev/rte_ethdev.h | 46 ++++++++++++++++++++++++++++++++++++++
3 files changed, 73 insertions(+)
diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
index 0f336f9567..b48681268c 100644
--- a/lib/ethdev/ethdev_driver.h
+++ b/lib/ethdev/ethdev_driver.h
@@ -1292,6 +1292,13 @@ typedef int (*eth_cman_config_set_t)(struct rte_eth_dev *dev,
typedef int (*eth_cman_config_get_t)(struct rte_eth_dev *dev,
struct rte_eth_cman_config *config);
+/** @internal
+ * Set header split payload mbuf callback for a receive queue.
+ */
+typedef int (*eth_hdrs_mbuf_set_cb_t)(struct rte_eth_dev *dev,
+ uint16_t rx_queue_id, void *priv,
+ rte_eth_hdrs_mbuf_callback_fn cb);
+
/**
* @internal
* Dump Rx descriptor info to a file.
@@ -1652,6 +1659,9 @@ struct eth_dev_ops {
/** Dump Tx descriptor info */
eth_tx_descriptor_dump_t eth_tx_descriptor_dump;
+ /** Set header split mbuf callback */
+ eth_hdrs_mbuf_set_cb_t hdrs_mbuf_set_cb;
+
/** Get congestion management information */
eth_cman_info_get_t cman_info_get;
/** Initialize congestion management structure with default values */
diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
index 9efeaf77cb..d5820ccd22 100644
--- a/lib/ethdev/rte_ethdev.c
+++ b/lib/ethdev/rte_ethdev.c
@@ -7316,6 +7316,23 @@ rte_eth_ip_reassembly_conf_set(uint16_t port_id,
return ret;
}
+RTE_EXPORT_EXPERIMENTAL_SYMBOL(rte_eth_hdrs_set_mbuf_callback, 26.07)
+int
+rte_eth_hdrs_set_mbuf_callback(uint16_t port_id, uint16_t rx_queue_id,
+ void *priv, rte_eth_hdrs_mbuf_callback_fn cb)
+{
+ struct rte_eth_dev *dev;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
+ dev = &rte_eth_devices[port_id];
+
+ if (dev->dev_ops->hdrs_mbuf_set_cb == NULL)
+ return -ENOTSUP;
+
+ return eth_err(port_id,
+ dev->dev_ops->hdrs_mbuf_set_cb(dev, rx_queue_id, priv, cb));
+}
+
RTE_EXPORT_EXPERIMENTAL_SYMBOL(rte_eth_dev_priv_dump, 22.03)
int
rte_eth_dev_priv_dump(uint16_t port_id, FILE *file)
diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
index ee400b386f..dbf2c23a35 100644
--- a/lib/ethdev/rte_ethdev.h
+++ b/lib/ethdev/rte_ethdev.h
@@ -6985,6 +6985,52 @@ rte_eth_tx_buffer(uint16_t port_id, uint16_t queue_id,
return rte_eth_tx_buffer_flush(port_id, queue_id, buffer);
}
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice.
+ *
+ * Buffer descriptor for header split payload mbuf callback.
+ */
+struct rte_eth_hdrs_mbuf {
+ void *buf_addr; /**< Virtual address of payload buffer. */
+ rte_iova_t buf_iova; /**< IOVA of payload buffer. */
+};
+
+/**
+ * Callback function type for providing custom payload mbufs
+ * in header split mode.
+ *
+ * @param priv
+ * User-provided private context.
+ * @param mbuf
+ * Pointer to buffer descriptor to be filled by the callback.
+ * @return
+ * 0 on success, negative errno on failure.
+ */
+typedef int (*rte_eth_hdrs_mbuf_callback_fn)(void *priv,
+ struct rte_eth_hdrs_mbuf *mbuf);
+
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice.
+ *
+ * Register a callback to provide custom payload mbufs for header split RX.
+ *
+ * @param port_id
+ * The port identifier of the Ethernet device.
+ * @param rx_queue_id
+ * The index of the receive queue.
+ * @param priv
+ * User-provided private context passed to the callback.
+ * @param cb
+ * Callback function that provides payload buffer descriptors.
+ * @return
+ * 0 on success, negative errno on failure.
+ */
+__rte_experimental
+int rte_eth_hdrs_set_mbuf_callback(uint16_t port_id, uint16_t rx_queue_id,
+ void *priv, rte_eth_hdrs_mbuf_callback_fn cb);
+
/**
* @warning
* @b EXPERIMENTAL: this API may change, or be removed, without prior notice
--
2.47.3
---------------------------------------------------------------------
Intel Technology Poland sp. z o.o.
ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN.
Spolka oswiadcza, ze posiada status duzego przedsiebiorcy w rozumieniu ustawy z dnia 8 marca 2013 r. o przeciwdzialaniu nadmiernym opoznieniom w transakcjach handlowych.
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* [PATCH v2 0/7] Intel network drivers enhancements
From: Dawid Wesierski @ 2026-06-18 14:38 UTC (permalink / raw)
To: dev; +Cc: thomas, david.marchand, Marek Kasiewicz
From: Marek Kasiewicz <marek.kasiewicz@intel.com>
This series introduces several improvements to Intel iavf and ice
drivers, including a new ethdev API for header split mbuf callbacks,
increased ring descriptors, and improved PTP timestamping.
Marek Kasiewicz (7):
ethdev: add header split mbuf callback API
net/iavf: increase max ring descriptors to hardware limit
net/iavf: allow runtime queue rate limit configuration
net/ice/base: reduce default scheduler burst size
net/ice: timestamp all received packets when PTP is enabled
net/iavf: disable runtime queue setup capability
net/intel: support header split mbuf callback
drivers/net/intel/common/rx.h | 2 +
drivers/net/intel/iavf/iavf_ethdev.c | 3 --
drivers/net/intel/iavf/iavf_rxtx.h | 2 +-
drivers/net/intel/iavf/iavf_tm.c | 11 ++--
drivers/net/intel/ice/base/ice_type.h | 2 +-
drivers/net/intel/ice/ice_ethdev.c | 1 +
drivers/net/intel/ice/ice_rxtx.c | 72 ++++++++++++++++++++++++---
drivers/net/intel/ice/ice_rxtx.h | 2 +
lib/ethdev/ethdev_driver.h | 15 +++++++
lib/ethdev/rte_ethdev.c | 51 ++++++++++++++++++++++
lib/ethdev/rte_ethdev.h | 7 +++
11 files changed, 153 insertions(+), 15 deletions(-)
--
2.47.3
---------------------------------------------------------------------
Intel Technology Poland sp. z o.o.
ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN.
Spolka oswiadcza, ze posiada status duzego przedsiebiorcy w rozumieniu ustawy z dnia 8 marca 2013 r. o przeciwdzialaniu nadmiernym opoznieniom w transakcjach handlowych.
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* [PATCH v3 1/1] pcapng: add user-supplied timestamp support
From: Dawid Wesierski @ 2026-06-18 14:38 UTC (permalink / raw)
To: dev; +Cc: stephen, thomas, Marek Kasiewicz, Dawid Wesierski
From: Marek Kasiewicz <marek.kasiewicz@intel.com>
Add rte_pcapng_copy_ts() which accepts a timestamp parameter in
nanoseconds since the Unix epoch. When non-zero, the supplied value is
used directly. This allows applications to provide hardware PTP
timestamps from the NIC, enabling accurate packet capture with
PTP-domain timing rather than host-local TSC values.
The existing rte_pcapng_copy() function is preserved as a static
inline wrapper that passes zero, keeping the original TSC-based
behaviour for callers that do not have a hardware timestamp.
To support both timestamp sources, the per-mbuf timestamp now carries
a sentinel bit: when rte_pcapng_copy_ts() is called with ts == 0 it
stores the current TSC with bit 63 set. rte_pcapng_write_packets()
detects the sentinel, clears it and converts TSC -> epoch ns using
the per-file clock before writing. A timestamp supplied by the caller
has bit 63 clear and is written unchanged. The sentinel space is safe
because the TSC counter does not reach bit 63 for centuries and
epoch-ns values stay below bit 63 until the year 2554.
Signed-off-by: Marek Kasiewicz <marek.kasiewicz@intel.com>
Signed-off-by: Dawid Wesierski <dawid.wesierski@intel.com>
---
.mailmap | 2 ++
lib/pcapng/rte_pcapng.c | 42 +++++++++++++++++++++++++++-------------
lib/pcapng/rte_pcapng.h | 43 +++++++++++++++++++++++++++++++++++++++--
3 files changed, 72 insertions(+), 15 deletions(-)
diff --git a/.mailmap b/.mailmap
index 4001e5fb0e..a7d97a631e 100644
--- a/.mailmap
+++ b/.mailmap
@@ -366,6 +366,7 @@ David Zeng <zengxhsh@cn.ibm.com>
Davide Caratti <dcaratti@redhat.com>
Dawid Gorecki <dgr@semihalf.com>
Dawid Jurczak <dawid_jurek@vp.pl>
+Dawid Wesierski <dawid.wesierski@intel.com> Wesierski, Dawid <dawid.wesierski@intel.com>
Dawid Zielinski <dawid.zielinski@intel.com>
Dawid Łukwiński <dawid.lukwinski@intel.com>
Daxue Gao <daxuex.gao@intel.com>
@@ -1014,6 +1015,7 @@ Marcin Wilk <marcin.wilk@caviumnetworks.com>
Marcin Wojtas <mw@semihalf.com>
Marcin Zapolski <marcinx.a.zapolski@intel.com>
Marco Varlese <mvarlese@suse.de>
+Marek Kasiewicz <marek.kasiewicz@intel.com>
Marek Mical <marekx.mical@intel.com>
Marek Zalfresso-jundzillo <marekx.zalfresso-jundzillo@intel.com>
Maria Lingemark <maria.lingemark@ericsson.com>
diff --git a/lib/pcapng/rte_pcapng.c b/lib/pcapng/rte_pcapng.c
index b5d1026891..29090a2ae4 100644
--- a/lib/pcapng/rte_pcapng.c
+++ b/lib/pcapng/rte_pcapng.c
@@ -546,14 +546,14 @@ pcapng_vlan_insert(struct rte_mbuf *m, uint16_t ether_type, uint16_t tci)
*/
/* Make a copy of original mbuf with pcapng header and options */
-RTE_EXPORT_SYMBOL(rte_pcapng_copy)
+RTE_EXPORT_SYMBOL(rte_pcapng_copy_ts)
struct rte_mbuf *
-rte_pcapng_copy(uint16_t port_id, uint32_t queue,
+rte_pcapng_copy_ts(uint16_t port_id, uint32_t queue,
const struct rte_mbuf *md,
struct rte_mempool *mp,
uint32_t length,
enum rte_pcapng_direction direction,
- const char *comment)
+ const char *comment, uint64_t ts)
{
struct pcapng_enhance_packet_block *epb;
uint32_t orig_len, pkt_len, padding, flags;
@@ -690,8 +690,20 @@ rte_pcapng_copy(uint16_t port_id, uint32_t queue,
/* Interface index is filled in later during write */
mc->port = port_id;
- /* Put timestamp in cycles here - adjust in packet write */
- timestamp = rte_get_tsc_cycles();
+ /*
+ * Timestamp handling:
+ * - If the caller supplied an explicit timestamp (ts != 0), it is
+ * already in nanoseconds since the Unix epoch, so store it as-is.
+ * - If the caller did not (ts == 0), store the current TSC and set
+ * the high bit as a sentinel so rte_pcapng_write_packets() knows
+ * it must convert TSC -> epoch ns at write time. The TSC counter
+ * will not reach bit 63 for centuries, and epoch-ns values stay
+ * below bit 63 until the year 2554, so the bit is safe to use.
+ */
+ if (ts != 0)
+ timestamp = ts;
+ else
+ timestamp = rte_get_tsc_cycles() | (UINT64_C(1) << 63);
epb->timestamp_hi = timestamp >> 32;
epb->timestamp_lo = (uint32_t)timestamp;
epb->capture_length = pkt_len;
@@ -720,7 +732,7 @@ rte_pcapng_write_packets(rte_pcapng_t *self,
for (i = 0; i < nb_pkts; i++) {
struct rte_mbuf *m = pkts[i];
struct pcapng_enhance_packet_block *epb;
- uint64_t cycles, timestamp;
+ uint64_t timestamp;
/* sanity check that is really a pcapng mbuf */
epb = rte_pktmbuf_mtod(m, struct pcapng_enhance_packet_block *);
@@ -738,14 +750,18 @@ rte_pcapng_write_packets(rte_pcapng_t *self,
}
/*
- * When data is captured by pcapng_copy the current TSC is stored.
- * Adjust the value recorded in file to PCAP epoch units.
+ * If rte_pcapng_copy[_ts]() stored a TSC value (high bit set
+ * as sentinel), convert it to nanoseconds since the Unix epoch
+ * using the per-file clock. Otherwise the timestamp is already
+ * in epoch ns and is written unchanged.
*/
- cycles = (uint64_t)epb->timestamp_hi << 32;
- cycles += epb->timestamp_lo;
- timestamp = tsc_to_ns_epoch(&self->clock, cycles);
- epb->timestamp_hi = timestamp >> 32;
- epb->timestamp_lo = (uint32_t)timestamp;
+ timestamp = ((uint64_t)epb->timestamp_hi << 32) | epb->timestamp_lo;
+ if (timestamp & (UINT64_C(1) << 63)) {
+ timestamp &= ~(UINT64_C(1) << 63);
+ timestamp = tsc_to_ns_epoch(&self->clock, timestamp);
+ epb->timestamp_hi = timestamp >> 32;
+ epb->timestamp_lo = (uint32_t)timestamp;
+ }
/*
* Handle case of highly fragmented and large burst size
diff --git a/lib/pcapng/rte_pcapng.h b/lib/pcapng/rte_pcapng.h
index d8d328f710..975e7996f0 100644
--- a/lib/pcapng/rte_pcapng.h
+++ b/lib/pcapng/rte_pcapng.h
@@ -109,7 +109,7 @@ enum rte_pcapng_direction {
};
/**
- * Format an mbuf for writing to file.
+ * Format an mbuf with time stamp for writing to file.
*
* @param port_id
* The Ethernet port on which packet was received
@@ -129,16 +129,55 @@ enum rte_pcapng_direction {
* @param comment
* Optional per packet comment.
* Truncated to UINT16_MAX characters.
+ * @param ts
+ * Packet timestamp in nanoseconds since the Unix epoch. If zero, the
+ * current TSC is captured and converted to epoch ns by
+ * rte_pcapng_write_packets() when the packet is written.
*
* @return
* - The pointer to the new mbuf formatted for pcapng_write
* - NULL on error such as invalid port or out of memory.
*/
struct rte_mbuf *
+rte_pcapng_copy_ts(uint16_t port_id, uint32_t queue,
+ const struct rte_mbuf *m, struct rte_mempool *mp,
+ uint32_t length,
+ enum rte_pcapng_direction direction, const char *comment, uint64_t ts);
+
+/**
+ * Format an mbuf for writing to file.
+ *
+ * @param port_id
+ * The Ethernet port on which packet was received
+ * or is going to be transmitted.
+ * @param queue
+ * The queue on the Ethernet port where packet was received
+ * or is going to be transmitted.
+ * @param mp
+ * The mempool from which the "clone" mbufs are allocated.
+ * @param m
+ * The mbuf to copy
+ * @param length
+ * The upper limit on bytes to copy. Passing UINT32_MAX
+ * means all data (after offset).
+ * @param direction
+ * The direction of the packer: receive, transmit or unknown.
+ * @param comment
+ * Packet comment.
+ *
+ * @return
+ * - The pointer to the new mbuf formatted for pcapng_write
+ * - NULL if allocation fails.
+ */
+static inline struct rte_mbuf *
rte_pcapng_copy(uint16_t port_id, uint32_t queue,
const struct rte_mbuf *m, struct rte_mempool *mp,
uint32_t length,
- enum rte_pcapng_direction direction, const char *comment);
+ enum rte_pcapng_direction direction, const char *comment)
+{
+ return rte_pcapng_copy_ts(port_id, queue, m, mp, length, direction,
+ comment, 0);
+}
/**
--
2.47.3
---------------------------------------------------------------------
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This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.
^ permalink raw reply related
* Re: [PATCH v3] dts: clean cryptodev environment after a test run
From: Andrew Bailey @ 2026-06-18 13:24 UTC (permalink / raw)
To: Patrick Robb; +Cc: luca.vizzarro, lylavoie, ahassick, knimoji, dev
In-Reply-To: <CAK6Duxv=rS07Wn9OOv=97DbvRYVNGmydH7_MPkcvXL+_dQC51w@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 431 bytes --]
On Wed, Jun 17, 2026 at 5:13 PM Patrick Robb <patrickrobb1997@gmail.com>
wrote:
> So, some cryptodevs must be unbound from their DPDK driver before they can
> be destroyed by linux? Out of curiosity, which devices are these?
>
> On the Intel QAT 4942, the virtual functions must be unbound and then
removed before the physical bdf is removed. Otherwise the system is left in
a bad state and causes subsequent failures.
[-- Attachment #2: Type: text/html, Size: 822 bytes --]
^ permalink raw reply
* Re: [PATCH v2 00/23] examples: fix -Wshadow warnings
From: Thomas Monjalon @ 2026-06-18 13:09 UTC (permalink / raw)
To: Stephen Hemminger; +Cc: dev
In-Reply-To: <20260407151732.272195-1-stephen@networkplumber.org>
07/04/2026 17:15, Stephen Hemminger:
> Several DPDK examples had -Wshadow disabled via no_shadow_cflag in
> their meson.build files. This series fixes all shadow variable
> warnings and removes the suppression flag, so that -Wshadow is
> enabled uniformly across every example.
>
> The fixes fall into three categories:
> - Renaming function parameters or local variables that shadow
> globals (most patches)
> - Removing unused function parameters that duplicated globals
> (dma, bond, flow_filtering, ipsec-secgw, vhost, qos_sched)
> - Simply removing no_shadow_cflag where there were no warnings
> (vm_power_manage, bbdev_app, l2fwd-crypto, l2fwd-event,
> l3fwd-graph)
>
> v2 - fix additional shadow warnings only visible with clang
Applied with fixes noted in the thread, thanks.
^ permalink raw reply
* [PATCH v2] net/iavf: report selected burst mode when no-poll active
From: Ciara Loftus @ 2026-06-18 12:17 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus, stable
In-Reply-To: <20260618094959.97727-1-ciara.loftus@intel.com>
When the no-poll feature is enabled (it is enabled by default), the
device burst functions point at the no-poll wrapper for the lifetime of
the port. As the wrapper occupies the "Disabled" slot in the burst mode
path-info tables, the Rx/Tx burst mode was always reported as "Disabled"
regardless of link state, even though the wrapper only drops traffic
while the link is down and otherwise dispatches to the selected path.
Report the burst mode of the selected path directly by indexing the
path-info tables with the selected path type. This fixes the misreport
while the no-poll wrapper is active and also simplifies the burst mode
lookup: the previous pointer comparison and table search loop are no
longer needed.
Fixes: 0d5a856f5be9 ("net/iavf: support Rx/Tx burst mode info")
Cc: stable@dpdk.org
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
v2:
* cast func_type to size_t in bounds check to fix -Wsign-compare error
---
drivers/net/intel/iavf/iavf_rxtx.c | 40 +++++++++++++++---------------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/net/intel/iavf/iavf_rxtx.c b/drivers/net/intel/iavf/iavf_rxtx.c
index decbc75142..a8ffb92b63 100644
--- a/drivers/net/intel/iavf/iavf_rxtx.c
+++ b/drivers/net/intel/iavf/iavf_rxtx.c
@@ -3567,18 +3567,18 @@ iavf_rx_burst_mode_get(struct rte_eth_dev *dev,
__rte_unused uint16_t queue_id,
struct rte_eth_burst_mode *mode)
{
- eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
- size_t i;
+ struct iavf_adapter *adapter =
+ IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
+ enum iavf_rx_func_type rx_func_type = adapter->rx_func_type;
- for (i = 0; i < RTE_DIM(iavf_rx_path_infos); i++) {
- if (pkt_burst == iavf_rx_path_infos[i].pkt_burst) {
- snprintf(mode->info, sizeof(mode->info), "%s",
- iavf_rx_path_infos[i].info);
- return 0;
- }
- }
+ if ((size_t)rx_func_type >= RTE_DIM(iavf_rx_path_infos) ||
+ iavf_rx_path_infos[rx_func_type].info == NULL)
+ return -EINVAL;
- return -EINVAL;
+ snprintf(mode->info, sizeof(mode->info), "%s",
+ iavf_rx_path_infos[rx_func_type].info);
+
+ return 0;
}
static const struct ci_tx_path_info iavf_tx_path_infos[] = {
@@ -3685,18 +3685,18 @@ iavf_tx_burst_mode_get(struct rte_eth_dev *dev,
__rte_unused uint16_t queue_id,
struct rte_eth_burst_mode *mode)
{
- eth_tx_burst_t pkt_burst = dev->tx_pkt_burst;
- size_t i;
+ struct iavf_adapter *adapter =
+ IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
+ enum iavf_tx_func_type tx_func_type = adapter->tx_func_type;
- for (i = 0; i < RTE_DIM(iavf_tx_path_infos); i++) {
- if (pkt_burst == iavf_tx_path_infos[i].pkt_burst) {
- snprintf(mode->info, sizeof(mode->info), "%s",
- iavf_tx_path_infos[i].info);
- return 0;
- }
- }
+ if ((size_t)tx_func_type >= RTE_DIM(iavf_tx_path_infos) ||
+ iavf_tx_path_infos[tx_func_type].info == NULL)
+ return -EINVAL;
- return -EINVAL;
+ snprintf(mode->info, sizeof(mode->info), "%s",
+ iavf_tx_path_infos[tx_func_type].info);
+
+ return 0;
}
static uint16_t
--
2.43.0
^ permalink raw reply related
* Re: [PATCH v2] eal: fix core_index for non-EAL registered threads
From: David Marchand @ 2026-06-18 10:36 UTC (permalink / raw)
To: Maxime Peim; +Cc: dev
In-Reply-To: <20260617080949.1658507-1-maxime.peim@gmail.com>
On Wed, 17 Jun 2026 at 10:10, Maxime Peim <maxime.peim@gmail.com> wrote:
>
> Threads registered via rte_thread_register() are assigned a valid
> lcore_id by eal_lcore_non_eal_allocate(), but their core_index in
> lcore_config is left at -1. This value was set during rte_eal_cpu_init()
> for lcores with ROLE_OFF (undetected CPUs) and is never updated when the
> lcore is later allocated to a non-EAL thread.
>
> As a result, rte_lcore_index() returns -1 for registered non-EAL
> threads. Libraries that use rte_lcore_index() to select per-lcore
> caches fall back to a shared global path when it returns -1, causing
> severe contention under concurrent access from multiple registered
> threads.
>
> A concrete example is the mlx5 indexed memory pool (mlx5_ipool), which
> uses rte_lcore_index() in mlx5_ipool_malloc_cache() to select a per-core
> cache slot. When core_index is -1, all registered threads are funneled
> into a single shared slot protected by a spinlock. In testing with VPP
> (which registers worker threads via rte_thread_register()), this caused
> async flow rule insertion throughput to drop from ~6.4M rules/sec to
> ~1.2M rules/sec with 4 workers -- a 5x regression attributable entirely
> to spinlock contention in the ipool allocator.
>
> Fix by tracking currently allocated core_index values in a bitset and
> assigning non-EAL threads the first free index. Keep the bitset in sync
> when initial EAL lcores are configured, when EAL core-list parsing
> remaps lcores, and when non-EAL registration fails or releases an lcore.
>
> Fixes: 5c307ba2a5b1 ("eal: register non-EAL threads as lcores")
> Signed-off-by: Maxime Peim <maxime.peim@gmail.com>
> ---
> v2:
> - Track allocated core_index values with a bitset instead of deriving
> the next non-EAL index from lcore_count, avoiding duplicate indices
> after non-EAL lcore release.
> - Keep the bitset in sync when default EAL lcores are discovered, when
> EAL lcore options remap the active set, and when non-EAL lcore
> registration rolls back or releases an lcore.
Acked-by: David Marchand <david.marchand@redhat.com>
Applied, thanks for this fix Maxime.
--
David Marchand
^ permalink raw reply
* RE: [PATCH 2/2] crypto/ipsec_mb: remove ZUC and SNOW 3G drivers from x86 build
From: De Lara Guarch, Pablo @ 2026-06-18 10:14 UTC (permalink / raw)
To: Nicolau, Radu, dev@dpdk.org
Cc: paul.elliott@arm.com, Shebu.VargheseKuriakose@arm.com,
Kantecki, Tomasz, Islam.Ragimov@arm.com,
Gowtham.SureshKumar@arm.com, Finn, Emma, Cornu, Marcel D,
gakhil@marvell.com, Mcnamara, John, Jonathan.Wright@arm.com,
Dhruv.Tripathi@arm.com, wathsala.vithanage@arm.com, Ji, Kai
In-Reply-To: <20260603092736.664428-2-radu.nicolau@intel.com>
> -----Original Message-----
> From: Nicolau, Radu <radu.nicolau@intel.com>
> Sent: Wednesday, June 3, 2026 10:28 AM
> To: dev@dpdk.org
> Cc: paul.elliott@arm.com; Shebu.VargheseKuriakose@arm.com; Kantecki,
> Tomasz <tomasz.kantecki@intel.com>; Islam.Ragimov@arm.com;
> Gowtham.SureshKumar@arm.com; Finn, Emma <emma.finn@intel.com>;
> Cornu, Marcel D <marcel.d.cornu@intel.com>; gakhil@marvell.com;
> Mcnamara, John <john.mcnamara@intel.com>; Jonathan.Wright@arm.com;
> Dhruv.Tripathi@arm.com; wathsala.vithanage@arm.com; Nicolau, Radu
> <radu.nicolau@intel.com>; Ji, Kai <kai.ji@intel.com>; De Lara Guarch, Pablo
> <pablo.de.lara.guarch@intel.com>
> Subject: [PATCH 2/2] crypto/ipsec_mb: remove ZUC and SNOW 3G drivers
> from x86 build
>
> The ZUC and SNOW 3G crypto drivers are using APIs that are now
> deprecated in the Intel IPsec Multi-Buffer library.
>
> Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
> ---
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
^ permalink raw reply
* RE: [PATCH 1/2] crypto/ipsec_mb: remove chacha-poly and kasumi drivers
From: De Lara Guarch, Pablo @ 2026-06-18 10:13 UTC (permalink / raw)
To: Nicolau, Radu, dev@dpdk.org
Cc: paul.elliott@arm.com, Shebu.VargheseKuriakose@arm.com,
Kantecki, Tomasz, Islam.Ragimov@arm.com,
Gowtham.SureshKumar@arm.com, Finn, Emma, Cornu, Marcel D,
gakhil@marvell.com, Mcnamara, John, Jonathan.Wright@arm.com,
Dhruv.Tripathi@arm.com, wathsala.vithanage@arm.com,
Thomas Monjalon, Fan Zhang, Ji, Kai
In-Reply-To: <20260603092736.664428-1-radu.nicolau@intel.com>
> -----Original Message-----
> From: Nicolau, Radu <radu.nicolau@intel.com>
> Sent: Wednesday, June 3, 2026 10:28 AM
> To: dev@dpdk.org
> Cc: paul.elliott@arm.com; Shebu.VargheseKuriakose@arm.com; Kantecki,
> Tomasz <tomasz.kantecki@intel.com>; Islam.Ragimov@arm.com;
> Gowtham.SureshKumar@arm.com; Finn, Emma <emma.finn@intel.com>;
> Cornu, Marcel D <marcel.d.cornu@intel.com>; gakhil@marvell.com;
> Mcnamara, John <john.mcnamara@intel.com>; Jonathan.Wright@arm.com;
> Dhruv.Tripathi@arm.com; wathsala.vithanage@arm.com; Nicolau, Radu
> <radu.nicolau@intel.com>; Thomas Monjalon <thomas@monjalon.net>;
> Fan Zhang <fanzhang.oss@gmail.com>; Ji, Kai <kai.ji@intel.com>; De Lara
> Guarch, Pablo <pablo.de.lara.guarch@intel.com>
> Subject: [PATCH 1/2] crypto/ipsec_mb: remove chacha-poly and kasumi
> drivers
>
> The Chacha20-poly1305 and KASUMI drivers were just wrappers around
> the main AESNI_MB driver, hence redundant and removed.
>
> Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
> ---
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
^ permalink raw reply
* [PATCH] net/iavf: report selected burst mode when no-poll active
From: Ciara Loftus @ 2026-06-18 9:49 UTC (permalink / raw)
To: dev; +Cc: Ciara Loftus, stable
When the no-poll feature is enabled (it is enabled by default), the
device burst functions point at the no-poll wrapper for the lifetime of
the port. As the wrapper occupies the "Disabled" slot in the burst mode
path-info tables, the Rx/Tx burst mode was always reported as "Disabled"
regardless of link state, even though the wrapper only drops traffic
while the link is down and otherwise dispatches to the selected path.
Report the burst mode of the selected path directly by indexing the
path-info tables with the selected path type. This fixes the misreport
while the no-poll wrapper is active and also simplifies the burst mode
lookup: the previous pointer comparison and table search loop are no
longer needed.
Fixes: 0d5a856f5be9 ("net/iavf: support Rx/Tx burst mode info")
Cc: stable@dpdk.org
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
drivers/net/intel/iavf/iavf_rxtx.c | 40 +++++++++++++++---------------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/net/intel/iavf/iavf_rxtx.c b/drivers/net/intel/iavf/iavf_rxtx.c
index decbc75142..9cc09583a3 100644
--- a/drivers/net/intel/iavf/iavf_rxtx.c
+++ b/drivers/net/intel/iavf/iavf_rxtx.c
@@ -3567,18 +3567,18 @@ iavf_rx_burst_mode_get(struct rte_eth_dev *dev,
__rte_unused uint16_t queue_id,
struct rte_eth_burst_mode *mode)
{
- eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
- size_t i;
+ struct iavf_adapter *adapter =
+ IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
+ enum iavf_rx_func_type rx_func_type = adapter->rx_func_type;
- for (i = 0; i < RTE_DIM(iavf_rx_path_infos); i++) {
- if (pkt_burst == iavf_rx_path_infos[i].pkt_burst) {
- snprintf(mode->info, sizeof(mode->info), "%s",
- iavf_rx_path_infos[i].info);
- return 0;
- }
- }
+ if (rx_func_type >= RTE_DIM(iavf_rx_path_infos) ||
+ iavf_rx_path_infos[rx_func_type].info == NULL)
+ return -EINVAL;
- return -EINVAL;
+ snprintf(mode->info, sizeof(mode->info), "%s",
+ iavf_rx_path_infos[rx_func_type].info);
+
+ return 0;
}
static const struct ci_tx_path_info iavf_tx_path_infos[] = {
@@ -3685,18 +3685,18 @@ iavf_tx_burst_mode_get(struct rte_eth_dev *dev,
__rte_unused uint16_t queue_id,
struct rte_eth_burst_mode *mode)
{
- eth_tx_burst_t pkt_burst = dev->tx_pkt_burst;
- size_t i;
+ struct iavf_adapter *adapter =
+ IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
+ enum iavf_tx_func_type tx_func_type = adapter->tx_func_type;
- for (i = 0; i < RTE_DIM(iavf_tx_path_infos); i++) {
- if (pkt_burst == iavf_tx_path_infos[i].pkt_burst) {
- snprintf(mode->info, sizeof(mode->info), "%s",
- iavf_tx_path_infos[i].info);
- return 0;
- }
- }
+ if (tx_func_type >= RTE_DIM(iavf_tx_path_infos) ||
+ iavf_tx_path_infos[tx_func_type].info == NULL)
+ return -EINVAL;
- return -EINVAL;
+ snprintf(mode->info, sizeof(mode->info), "%s",
+ iavf_tx_path_infos[tx_func_type].info);
+
+ return 0;
}
static uint16_t
--
2.43.0
^ permalink raw reply related
* Re: [PATCH v2 09/23] examples/ipsec-secgw: resolve shadowed variable warnings
From: Thomas Monjalon @ 2026-06-18 9:20 UTC (permalink / raw)
To: Stephen Hemminger; +Cc: dev, Bruce Richardson, Radu Nicolau, Akhil Goyal
In-Reply-To: <20260407151732.272195-10-stephen@networkplumber.org>
07/04/2026 17:16, Stephen Hemminger:
> Rename variables where local variable shadows a global declaration.
> Remove unused lcore_conf parameter from sa_init().
> Replace shadowed optarg with parameter named arg.
There are more in the Arm implementation.
^ permalink raw reply
* Re: [PATCH v2 12/23] examples/vm_power_manage: enable shadow warnings
From: Thomas Monjalon @ 2026-06-18 9:12 UTC (permalink / raw)
To: Stephen Hemminger
Cc: dev, Stephen Hemminger, Bruce Richardson, Anatoly Burakov,
Sivaprasad Tummala
In-Reply-To: <20260407151732.272195-13-stephen@networkplumber.org>
07/04/2026 17:16, Stephen Hemminger:
> No problems in this code, re-enable the warning.
Actually, there are a lot of variables ret defined multiple times
in the same function.
^ permalink raw reply
* Re: [PATCH v2 3/6] net/dpaa2: support Rx queue interrupts
From: David Marchand @ 2026-06-18 8:46 UTC (permalink / raw)
To: Maxime Leroy; +Cc: dev, Hemant Agrawal, Sachin Saxena
In-Reply-To: <20260616102727.708948-4-maxime@leroys.fr>
Hello Maxime,
On Tue, 16 Jun 2026 at 12:28, Maxime Leroy <maxime@leroys.fr> wrote:
>
> Implement .rx_queue_intr_enable / .rx_queue_intr_disable so a worker
> can sleep on a queue's data-availability notification instead of
> busy-polling, through the generic rte_eth_dev_rx_intr_* API.
>
> A worker wakes on its software portal's DQRI, which fires when the
> portal's DQRR holds frames, so the Rx FQ must be scheduled to a channel
> that portal dequeues. The natural dpni_set_queue with a notification
> destination holds the global MC lock long enough to wedge the firmware
> and must target a disabled dpni. But the polling portal is only known
> once a worker affines, after dev_start, so the destination cannot be
> the worker's portal.
>
> Bind each Rx FQ to its own DPCON channel instead. The default Rx burst
> pulls frames from the FQ with a volatile dequeue and cannot be
> interrupt-driven; to wake on the DQRI the FQ must be pushed to the
> portal's DQRR. dev_start issues the DEST_DPCON set_queue statically on
> the still-disabled dpni with no knowledge of the polling lcore; a worker
> later subscribes its own ethrx portal to the channel and arms the DQRI
> in rx_queue_intr_enable (a one-shot per-portal MC op plus QBMan, never
> the wedging set_queue).
>
> This pushed/DQRR consumption is how the event PMD works, but the DPCON
> use differs. The event PMD uses one DPCON per worker, concentrates N
> FQs onto it, and lets the QBMan scheduler load-balance events across
> cores. Here affinity is static and there is no scheduling, so each FQ
> gets its own DPCON (one per FQ, more channels, drawn from the shared
> pool that the DPCON move to the fslmc bus now feeds), bound once at
> dev_start before the lcore is known. Frames are delivered by
> rte_eth_rx_burst (dpaa2_dev_rx_dqrr), not as events via
> rte_event_dequeue.
>
> rte_eth_dev_rx_intr_enable(q) subscribes the lcore portal to q's DPCON
> and arms the DQRI. rte_eth_dev_rx_intr_ctl_q(q) adds q's eventfd (the
> portal DQRI fd) to the thread epoll.
>
> wire
> |
> [ DPMAC ]
> |
> [ DPNI ] (1)
> |
> TC0: FQ0 FQ1 FQ2 FQ3 (2)
> | | | | (3)
> [DPCON][DPCON][DPCON][DPCON]
> \ | | / (4)
> [ DPIO A ] [ DPIO B ] (5)
> | |
> DQRR DQRR (6)
> | |
> DQRI DQRI (7)
> | |
> eventfd eventfd (8)
> | |
> rte_epoll_wait rte_epoll_wait (9)
> | |
> dpaa2_dev_rx_dqrr (10)
>
> (1) WRIOP picks a TC (QoS), then RSS-hashes within the TC to an FQ
> (2) FQ0..FQ3 are the rte_eth Rx queues
> (3) dpni_set_queue(DEST_DPCON): one DPCON per FQ
> (4) the lcore portal subscribes to its DPCONs (push_set)
> (5) one QBMan software portal per lcore
> (6) QMan pushes the FDs into the portal DQRR
> (7) DQRI is raised when the DQRR is non-empty
> (8) a portal's queues share one fd (its DQRI eventfd)
> (9) worker sleeps here when all its queues are idle
> (10) dpaa2_dev_rx_dqrr drains the DQRR, demuxes FDs to FQs by fqd_ctx
>
> The DQRI and eventfd are portal-wide: a queue's eventfd is its portal's
> DQRI fd, and the inhibit bit is refcounted by armed queues so disabling
> one queue never masks a sibling. The static per-queue bind also lets a
> queue be re-homed to another lcore at runtime, the new worker
> reclaiming the channel, with no set_queue and no port stop.
>
> On single-core 64-byte forwarding this interrupt path runs at ~5.0 Mpps
> versus ~5.86 Mpps polling: per-frame DQRR demux and consume cost about
> 15 percent over the polling batch dequeue.
>
> Signed-off-by: Maxime Leroy <maxime@leroys.fr>
I did not review in detail, but one aspect caught my eye:
[snip]
> diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
> index 803a8321e0..61e7c820de 100644
> --- a/drivers/net/dpaa2/dpaa2_ethdev.c
> +++ b/drivers/net/dpaa2/dpaa2_ethdev.c
[snip]
> @@ -845,6 +853,19 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
> }
> }
>
> + if (dev->data->dev_conf.intr_conf.rxq) {
> + if (!dev->intr_handle)
> + dev->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);
Something is strange here.
I plan to move this allocation in the probe_device handler of the bus
(https://patchwork.dpdk.org/project/dpdk/patch/20260611094551.1514962-6-david.marchand@redhat.com/).
However, even without this change of mine, the intr_handle should be
allocated in the bus code (see allocation in scan_one_fslmc_device).
A NULL pointer during configure indicates a bug somewhere around the
device pointer life.
> + if (!dev->intr_handle ||
> + rte_intr_vec_list_alloc(dev->intr_handle, "rxq_intr",
> + dev->data->nb_rx_queues) ||
> + rte_intr_nb_efd_set(dev->intr_handle, dev->data->nb_rx_queues) ||
> + rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_EXT)) {
> + DPAA2_PMD_ERR("Failed to set up rx-queue interrupts");
> + return -rte_errno;
> + }
> + }
> +
> dpaa2_tm_init(dev);
>
> return 0;
--
David Marchand
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