From: Marek Vasut <marex@denx.de>
To: Maxime Ripard <maxime@cerno.tech>
Cc: Sam Ravnborg <sam@ravnborg.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
dri-devel@lists.freedesktop.org,
Neil Armstrong <narmstrong@baylibre.com>
Subject: Re: [PATCH 3/7] drm/bridge: Extend struct drm_bus_cfg with clock field
Date: Thu, 24 Feb 2022 21:07:19 +0100 [thread overview]
Message-ID: <0cc9da51-d94d-82be-69ef-80f8dc0544fd@denx.de> (raw)
In-Reply-To: <20220224151902.4qdgdxdufvmhwezm@houat>
On 2/24/22 16:19, Maxime Ripard wrote:
> Hi,
Hi,
> On Sat, Feb 19, 2022 at 01:28:40AM +0100, Marek Vasut wrote:
>> diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h
>> index 1701c2128a5cb..32455cf28f0bc 100644
>> --- a/include/drm/drm_atomic.h
>> +++ b/include/drm/drm_atomic.h
>> @@ -1077,6 +1077,11 @@ struct drm_bus_cfg {
>> * @flags: DRM_BUS_* flags used on this bus
>> */
>> u32 flags;
>> +
>> + /**
>> + * @clock: Clock frequency in kHz used on this bus
>> + */
>> + u32 clock;
>> };
>
> This is fairly vague. You were mentioning DSI: is it the pixel clock?
DSI HS clock is the one I need.
I hope we can flesh out what exactly should be in here.
> The HS clock rate?
Yes
> With or without counting the lanes? What about the
Without
> burst mode: would it be the lane or pixel rate?
Still the HS clock rate.
> It would be just as confusing for HDMI: is it the the TMDS character
> rate? The TMDS bit rate ? TMDS Clock rate?
For HDMI I would expect 148.5 MHz here , and if HDMI needs additional
extras, they might have to be added to struct drm_bus_cfg as extra fields ?
next prev parent reply other threads:[~2022-02-24 20:07 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-19 0:28 [RFC][PATCH 0/7] drm/bridge: Add support for selecting DSI host HS clock from DSI bridge Marek Vasut
2022-02-19 0:28 ` [PATCH 1/7] drm/bridge: Pass struct drm_bus_cfg to select_bus_fmt_recursive() Marek Vasut
2022-02-19 0:28 ` [PATCH 2/7] drm/bridge: Add new atomic_get_input_bus_cfgs callback Marek Vasut
2022-02-19 0:28 ` [PATCH 3/7] drm/bridge: Extend struct drm_bus_cfg with clock field Marek Vasut
2022-02-24 15:19 ` Maxime Ripard
2022-02-24 20:07 ` Marek Vasut [this message]
2022-02-25 10:51 ` Maxime Ripard
2022-02-19 0:28 ` [PATCH 4/7] drm/bridge: dw-mipi-dsi: Move PLL setup into atomic_enable Marek Vasut
2022-02-19 0:28 ` [PATCH 5/7] drm/bridge: dw-mipi-dsi: Pass bridge state into dw_mipi_dsi_get_lane_mbps() Marek Vasut
2022-02-19 0:28 ` [PATCH 6/7] drm/bridge: dw-mipi-dsi: Prefer DSI bus clock settings from bridge_state Marek Vasut
2022-02-19 0:28 ` [PATCH 7/7] drm/bridge: tc358767: Add support for PLL clock derivation from DSI HS clock Marek Vasut
2022-02-24 15:40 ` [RFC][PATCH 0/7] drm/bridge: Add support for selecting DSI host HS clock from DSI bridge Maxime Ripard
2022-02-24 20:24 ` Marek Vasut
2022-02-25 8:40 ` Maxime Ripard
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