From mboxrd@z Thu Jan 1 00:00:00 1970 From: alexdeucher@gmail.com Subject: [PATCH 1/5] drm/radeon: add GPU reset flags Date: Thu, 3 Jan 2013 13:16:45 -0500 Message-ID: <1357237009-28042-1-git-send-email-alexdeucher@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-qc0-f181.google.com (mail-qc0-f181.google.com [209.85.216.181]) by gabe.freedesktop.org (Postfix) with ESMTP id 6BF05E61AD for ; Thu, 3 Jan 2013 10:16:57 -0800 (PST) Received: by mail-qc0-f181.google.com with SMTP id x40so8263391qcp.12 for ; Thu, 03 Jan 2013 10:16:57 -0800 (PST) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: airlied@gmail.com, dri-devel@lists.freedesktop.org Cc: Alex Deucher List-Id: dri-devel@lists.freedesktop.org From: Alex Deucher The idea here is to move to a finer grained reset. In some cases we may not need reset every block, and in other cases we may not need to re-init the entire asic. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/radeon.h | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 9b9422c..34e5230 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -132,6 +132,11 @@ extern int radeon_lockup_timeout; #define RADEON_VA_RESERVED_SIZE (8 << 20) #define RADEON_IB_VM_MAX_SIZE (64 << 10) +/* reset flags */ +#define RADEON_RESET_GFX (1 << 0) +#define RADEON_RESET_COMPUTE (1 << 1) +#define RADEON_RESET_DMA (1 << 2) + /* * Errata workarounds. */ -- 1.7.7.5