[PATCHv3 0/2] Speed Cap fixes for ppc64

[Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com>]

After all the comments in the last patch series, I did a refactoring of what I was proposing and came up with this. Basically, now:
  1. max_bus_speed is used to set the device to gen2 speeds
  2. on power there's no longer a conflict between the pseries call and other architectures, because the overwrite is done via a ppc_md hook
  3. radeon is using bus->max_bus_speed instead of drm_pcie_get_speed_cap_mask for gen2 capability detection

The first patch consists of some architecture changes, such as adding a hook on powerpc for pci_root_bridge_prepare, so that pseries will initialize it to a function, while all other architectures get a NULL pointer. So that whenever whenever pci_create_root_bus is called, we'll get max_bus_speed properly setup from OpenFirmware.

The second patch consists of simple radeon changes not to call drm_get_pcie_speed_cap_mask anymore. I assume that on x86 machines, the max_bus_speed property will be properly set already.

Lucas Kannebley Tavares (2):
  ppc64: perform proper max_bus_speed detection
  radeon: use max_bus_speed to activate gen2 speeds

 arch/powerpc/include/asm/machdep.h     |    2 +
 arch/powerpc/kernel/pci-common.c       |    8 +++++
 arch/powerpc/platforms/pseries/pci.c   |   51 ++++++++++++++++++++++++++++++++
 arch/powerpc/platforms/pseries/setup.c |    4 ++
 drivers/gpu/drm/radeon/evergreen.c     |    9 +----
 drivers/gpu/drm/radeon/r600.c          |    8 +----
 drivers/gpu/drm/radeon/rv770.c         |    8 +----
 7 files changed, 69 insertions(+), 21 deletions(-)

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1.7.4.4