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From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Darren Etheridge <detheridge@ti.com>,
	David Airlie <airlied@linux.ie>, Rob Clark <robdclark@gmail.com>,
	Russell King <rmk+kernel@arm.linux.org.uk>,
	Daniel Vetter <daniel.vetter@ffwll.ch>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: [PATCH 8/8] drm/tilcdc fixup mode to workaound sync for tda998x
Date: Tue,  6 Aug 2013 00:20:18 +0200	[thread overview]
Message-ID: <1375741218-10225-9-git-send-email-sebastian.hesselbarth@gmail.com> (raw)
In-Reply-To: <1375741218-10225-1-git-send-email-sebastian.hesselbarth@gmail.com>

From: Darren Etheridge <detheridge@ti.com>

Add a fixup function that will flip the hsync priority and
add a hskew value that is used to shift the tda998x to the
right by a variable number of pixels depending on the mode.
This works around an issue with the sync timings that tilcdc
is outputing.

Signed-off-by: Darren Etheridge <detheridge@ti.com>
---
Changelog:
for v1:
- reword comment

Cc: David Airlie <airlied@linux.ie>
Cc: Darren Etheridge <detheridge@ti.com>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: dri-devel@lists.freedesktop.org
Cc: linux-kernel@vger.kernel.org
---
 drivers/gpu/drm/tilcdc/tilcdc_crtc.c  |    7 ++++++-
 drivers/gpu/drm/tilcdc/tilcdc_slave.c |   27 ++++++++++++++++++++++++++-
 2 files changed, 32 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 7418dcd..6d05240 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -379,7 +379,12 @@ static int tilcdc_crtc_mode_set(struct drm_crtc *crtc,
 	else
 		tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_EDGE);
 
-	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
+	/*
+	 * use value from adjusted_mode here as this might have been
+	 * changed as part of the fixup for slave encoders to solve the
+	 * issue where tilcdc timings are not VESA compliant
+	 */
+	if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 		tilcdc_set(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_HSYNC);
 	else
 		tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_HSYNC);
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_slave.c b/drivers/gpu/drm/tilcdc/tilcdc_slave.c
index 0bf5999..f6e9c26 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_slave.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_slave.c
@@ -73,13 +73,38 @@ static void slave_encoder_prepare(struct drm_encoder *encoder)
 	tilcdc_crtc_set_panel_info(encoder->crtc, &slave_info);
 }
 
+static bool slave_encoder_fixup(struct drm_encoder *encoder,
+		const struct drm_display_mode *mode,
+		struct drm_display_mode *adjusted_mode)
+{
+	/*
+	 * tilcdc does not generate VESA-complient sync but aligns
+	 * VS on the second edge of HS instead of first edge.
+	 * We use adjusted_mode, to fixup sync by aligning both rising
+	 * edges and add HSKEW offset to let the slave encoder fix it up.
+	 */
+	adjusted_mode->hskew = mode->hsync_end - mode->hsync_start;
+	adjusted_mode->flags |= DRM_MODE_FLAG_HSKEW;
+
+	if (mode->flags & DRM_MODE_FLAG_NHSYNC) {
+		adjusted_mode->flags |= DRM_MODE_FLAG_PHSYNC;
+		adjusted_mode->flags &= ~DRM_MODE_FLAG_NHSYNC;
+	} else {
+		adjusted_mode->flags |= DRM_MODE_FLAG_NHSYNC;
+		adjusted_mode->flags &= ~DRM_MODE_FLAG_PHSYNC;
+	}
+
+	return drm_i2c_encoder_mode_fixup(encoder, mode, adjusted_mode);
+}
+
+
 static const struct drm_encoder_funcs slave_encoder_funcs = {
 		.destroy        = slave_encoder_destroy,
 };
 
 static const struct drm_encoder_helper_funcs slave_encoder_helper_funcs = {
 		.dpms           = drm_i2c_encoder_dpms,
-		.mode_fixup     = drm_i2c_encoder_mode_fixup,
+		.mode_fixup     = slave_encoder_fixup,
 		.prepare        = slave_encoder_prepare,
 		.commit         = drm_i2c_encoder_commit,
 		.mode_set       = drm_i2c_encoder_mode_set,
-- 
1.7.10.4

  parent reply	other threads:[~2013-08-05 22:20 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-05 22:20 [PATCH 0/8] Several NXP TDA998x patches Sebastian Hesselbarth
2013-08-05 22:20 ` [PATCH 1/8] drm/i2c: tda998x: fix EDID reading on TDA19988 devices Sebastian Hesselbarth
2013-08-14 12:16   ` Russell King - ARM Linux
2013-08-14 12:32     ` Rob Clark
2013-08-05 22:20 ` [PATCH 2/8] drm/i2c: tda998x: ensure VIP output mux is properly set Sebastian Hesselbarth
2013-08-14 12:15   ` Russell King - ARM Linux
2013-08-05 22:20 ` [PATCH 3/8] drm/i2c: tda998x: fix npix/nline programming Sebastian Hesselbarth
2013-08-05 22:20 ` [PATCH 4/8] drm/i2c: tda998x: prepare for video input configuration Sebastian Hesselbarth
2013-08-05 22:20 ` [PATCH 5/8] drm/i2c: tda998x: add video and audio " Sebastian Hesselbarth
2013-08-14 12:20   ` Russell King - ARM Linux
2013-08-14 14:12   ` Russell King - ARM Linux
2013-08-14 14:34     ` Sebastian Hesselbarth
2013-08-05 22:20 ` [PATCH 6/8] drm/i2c: tda998x: fix sync generation and calculation Sebastian Hesselbarth
2013-08-14 12:41   ` Russell King - ARM Linux
2013-08-14 14:14     ` Sebastian Hesselbarth
2013-08-14 14:35   ` Russell King - ARM Linux
2013-08-05 22:20 ` [PATCH 7/8] drm/i2c: tda998x: prepare for broken sync workaround Sebastian Hesselbarth
2013-08-05 22:20 ` Sebastian Hesselbarth [this message]
2013-08-06 16:26 ` [PATCH 0/8] Several NXP TDA998x patches Etheridge, Darren
2013-08-08 22:08 ` Darren Etheridge

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