From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex Deucher Subject: [PATCH 3/3] drm/radeon/dpm: only need to reprogram uvd if uvd pg is enabled Date: Thu, 29 Aug 2013 17:24:50 -0400 Message-ID: <1377811490-4649-3-git-send-email-alexander.deucher@amd.com> References: <1377811490-4649-1-git-send-email-alexander.deucher@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ve0-f173.google.com (mail-ve0-f173.google.com [209.85.128.173]) by gabe.freedesktop.org (Postfix) with ESMTP id 1B5EBE5CF9 for ; Thu, 29 Aug 2013 14:25:01 -0700 (PDT) Received: by mail-ve0-f173.google.com with SMTP id cy12so763331veb.4 for ; Thu, 29 Aug 2013 14:25:00 -0700 (PDT) In-Reply-To: <1377811490-4649-1-git-send-email-alexander.deucher@amd.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: dri-devel@lists.freedesktop.org Cc: Alex Deucher List-Id: dri-devel@lists.freedesktop.org Avoid needless uvd reprogramming if uvd powergating is disabled. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/kv_dpm.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c index a102077..15a6f67 100644 --- a/drivers/gpu/drm/radeon/kv_dpm.c +++ b/drivers/gpu/drm/radeon/kv_dpm.c @@ -1491,17 +1491,20 @@ void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate) pi->uvd_power_gated = gate; if (gate) { - uvd_v1_0_stop(rdev); - cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, false); + if (pi->caps_uvd_pg) { + uvd_v1_0_stop(rdev); + cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, false); + } kv_update_uvd_dpm(rdev, gate); if (pi->caps_uvd_pg) kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerOFF); } else { - if (pi->caps_uvd_pg) + if (pi->caps_uvd_pg) { kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerON); - uvd_v4_2_resume(rdev); - uvd_v1_0_start(rdev); - cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, true); + uvd_v4_2_resume(rdev); + uvd_v1_0_start(rdev); + cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, true); + } kv_update_uvd_dpm(rdev, gate); } } -- 1.8.3.1