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From: Alex Deucher <alexdeucher@gmail.com>
To: dri-devel@lists.freedesktop.org
Cc: Alex Deucher <alexander.deucher@amd.com>
Subject: [PATCH 4/6] drm/radeon/dpm/si: filter clocks based on voltage/clk dep tables
Date: Sat, 21 Sep 2013 15:53:22 -0400	[thread overview]
Message-ID: <1379793204-16730-4-git-send-email-alexander.deucher@amd.com> (raw)
In-Reply-To: <1379793204-16730-1-git-send-email-alexander.deucher@amd.com>

Filter out mclk and sclk levels higher than listed in the clk
voltage dependency tables.  Supporting these clocks will require
additional driver tweaking that isn't supported yet.

See bug:
https://bugs.freedesktop.org/show_bug.cgi?id=68235

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/radeon/si_dpm.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index cfe5d4d..9ace287 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -2910,6 +2910,7 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
 	bool disable_sclk_switching = false;
 	u32 mclk, sclk;
 	u16 vddc, vddci;
+	u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
 	int i;
 
 	if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
@@ -2943,6 +2944,29 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
 		}
 	}
 
+	/* limit clocks to max supported clocks based on voltage dependency tables */
+	btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
+							&max_sclk_vddc);
+	btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
+							&max_mclk_vddci);
+	btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
+							&max_mclk_vddc);
+
+	for (i = 0; i < ps->performance_level_count; i++) {
+		if (max_sclk_vddc) {
+			if (ps->performance_levels[i].sclk > max_sclk_vddc)
+				ps->performance_levels[i].sclk = max_sclk_vddc;
+		}
+		if (max_mclk_vddci) {
+			if (ps->performance_levels[i].mclk > max_mclk_vddci)
+				ps->performance_levels[i].mclk = max_mclk_vddci;
+		}
+		if (max_mclk_vddc) {
+			if (ps->performance_levels[i].mclk > max_mclk_vddc)
+				ps->performance_levels[i].mclk = max_mclk_vddc;
+		}
+	}
+
 	/* XXX validate the min clocks required for display */
 
 	if (disable_mclk_switching) {
-- 
1.8.3.1

  parent reply	other threads:[~2013-09-21 19:53 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-21 19:53 [PATCH 1/6] drm/radeon/dpm: fetch the max clk from voltage dep tables helper Alex Deucher
2013-09-21 19:53 ` [PATCH 2/6] drm/radeon/dpm/btc: filter clocks based on voltage/clk dep tables Alex Deucher
2013-09-21 19:53 ` [PATCH 3/6] drm/radeon/dpm/ni: " Alex Deucher
2013-09-21 19:53 ` Alex Deucher [this message]
2013-09-21 19:53 ` [PATCH 5/6] drm/radeon/dpm/ci: " Alex Deucher
2013-09-21 19:53 ` [PATCH 6/6] drm/radeon: don't set default clocks for SI when DPM is disabled Alex Deucher

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