From mboxrd@z Thu Jan 1 00:00:00 1970 From: Benjamin Herrenschmidt Subject: Re: Radeon drivers on PowerPC (e500) Date: Wed, 18 Jun 2014 11:48:36 +1000 Message-ID: <1403056116.7661.187.camel@pasglop> References: <53A09378.6060101@ge.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by gabe.freedesktop.org (Postfix) with ESMTP id EEBFE89138 for ; Tue, 17 Jun 2014 18:48:58 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Dave Airlie , Martyn Welch Cc: Alex Deucher , Christian =?ISO-8859-1?Q?K=F6nig?= , dri-devel List-Id: dri-devel@lists.freedesktop.org On Wed, 2014-06-18 at 11:05 +1000, Dave Airlie wrote: > > I don't think we ever ioremap GART, it should kmap GART pages, ioremap > should only happen for VRAM areas AFAIK, > > This isn't some 32-bit vs 36-bit BAR or something, I seem to remember BenH > mentioning something like that before. Yes, it's a recurring problem in the DRM with physical addresses that are bigger than 32-bit on 32-bit systems. There have been patches done to fix that but afaik never quite "completed". I can dig internally if I can put my hand onto something. If possible at all, can you try to configure your SoC to bring the MMIO space of the PCIe within the bottom 32-bit of the chip address space ? (Or use a 64-bit e5500 based chip ? :-) Cheers, Ben.