From mboxrd@z Thu Jan 1 00:00:00 1970 From: sonika.jindal@intel.com Subject: [PATCH 6/6] drm/tegra: Renaming DP training vswing/pre-emph defines Date: Tue, 5 Aug 2014 16:38:22 +0530 Message-ID: <1407236902-11326-7-git-send-email-sonika.jindal@intel.com> References: <1407236902-11326-1-git-send-email-sonika.jindal@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1407236902-11326-1-git-send-email-sonika.jindal@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org From: Sonika Jindal Signed-off-by: Sonika Jindal --- drivers/gpu/drm/tegra/dpaux.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c index 3f132e3..34f3c1d 100644 --- a/drivers/gpu/drm/tegra/dpaux.c +++ b/drivers/gpu/drm/tegra/dpaux.c @@ -532,9 +532,9 @@ int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link, for (i = 0; i < link->num_lanes; i++) values[i] = DP_TRAIN_MAX_PRE_EMPHASIS_REACHED | - DP_TRAIN_PRE_EMPHASIS_0 | + DP_TRAIN_PRE_EMPHASIS_LEVEL_0 | DP_TRAIN_MAX_SWING_REACHED | - DP_TRAIN_VOLTAGE_SWING_400; + DP_TRAIN_VOLTAGE_SWING_LEVEL_0; err = drm_dp_dpcd_write(&dpaux->aux, DP_TRAINING_LANE0_SET, values, link->num_lanes); -- 1.7.10.4