From mboxrd@z Thu Jan 1 00:00:00 1970 From: Inki Dae Subject: [PATCH 1/2] drm/mipi-dsi: consider low power transmission Date: Mon, 18 Aug 2014 17:11:34 +0900 Message-ID: <1408349495-25568-2-git-send-email-inki.dae@samsung.com> References: <1408349495-25568-1-git-send-email-inki.dae@samsung.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) by gabe.freedesktop.org (Postfix) with ESMTP id C871889E3B for ; Mon, 18 Aug 2014 01:11:38 -0700 (PDT) Received: from epcpsbgr1.samsung.com (u141.gpu120.samsung.co.kr [203.254.230.141]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NAH00FJ1TFDQCC0@mailout2.samsung.com> for dri-devel@lists.freedesktop.org; Mon, 18 Aug 2014 17:11:37 +0900 (KST) In-reply-to: <1408349495-25568-1-git-send-email-inki.dae@samsung.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org Cc: a.hajda@samsung.com List-Id: dri-devel@lists.freedesktop.org This patch adds a new flag, MIPI_DSI-MODE_LPM, to transmit data in low power. With this flag, msg.flags has MIPI_DSI_MSG_USE_LPM so that host driver of each SoC can clear or set relevant register bit for low power transmission. All host drivers shall support continuous clock behavior on the Clock Lane, and optionally may support non-continuous clock behavior. Both of them can transmit data in high speed of low power. With each clock behavior, non-continuous or continuous clock mode, host controller will transmit data in high speed by default so if peripheral wants to receive data in low power, the peripheral driver should set MIPI_DSI_MODE_LPM flag. Signed-off-by: Inki Dae --- drivers/gpu/drm/drm_mipi_dsi.c | 6 ++++++ include/drm/drm_mipi_dsi.h | 2 ++ 2 files changed, 8 insertions(+) diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index 6aa6a9e..eb6dfe5 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -231,6 +231,9 @@ ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, const void *data, break; } + if (dsi->mode_flags & MIPI_DSI_MODE_LPM) + msg.flags = MIPI_DSI_MSG_USE_LPM; + return ops->transfer(dsi->host, &msg); } EXPORT_SYMBOL(mipi_dsi_dcs_write); @@ -260,6 +263,9 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data, if (!ops || !ops->transfer) return -ENOSYS; + if (dsi->mode_flags & MIPI_DSI_MODE_LPM) + msg.flags = MIPI_DSI_MSG_USE_LPM; + return ops->transfer(dsi->host, &msg); } EXPORT_SYMBOL(mipi_dsi_dcs_read); diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 2bb55b8..8569dc5 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -96,6 +96,8 @@ void mipi_dsi_host_unregister(struct mipi_dsi_host *host); #define MIPI_DSI_MODE_EOT_PACKET BIT(9) /* device supports non-continuous clock behavior (DSI spec 5.6.1) */ #define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10) +/* transmit data in low power */ +#define MIPI_DSI_MODE_LPM BIT(11) enum mipi_dsi_pixel_format { MIPI_DSI_FMT_RGB888, -- 1.7.9.5