From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?Christian=20K=C3=B6nig?= Subject: [PATCH 3/9] drm/radeon: fix display handling in radeon_gpu_reset Date: Tue, 26 Aug 2014 18:35:04 +0200 Message-ID: <1409070910-2549-3-git-send-email-deathsimple@vodafone.de> References: <1409070910-2549-1-git-send-email-deathsimple@vodafone.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from pegasos-out.vodafone.de (pegasos-out.vodafone.de [80.84.1.38]) by gabe.freedesktop.org (Postfix) with ESMTP id 40AF96E495 for ; Tue, 26 Aug 2014 09:35:34 -0700 (PDT) Received: from localhost (localhost.localdomain [127.0.0.1]) by pegasos-out.vodafone.de (Rohrpostix1 Daemon) with ESMTP id B08832613F0 for ; Tue, 26 Aug 2014 18:35:33 +0200 (CEST) Received: from pegasos-out.vodafone.de ([127.0.0.1]) by localhost (rohrpostix1.prod.vfnet.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id WoLdHhB4K3PV for ; Tue, 26 Aug 2014 18:35:23 +0200 (CEST) Received: from smtp-03.vodafone.de (smtp-03.vodafone.de [10.215.254.38]) by pegasos-out.vodafone.de (Rohrpostix1 Daemon) with ESMTP id 86FC4261403 for ; Tue, 26 Aug 2014 18:35:23 +0200 (CEST) Received: from smtp-03.vodafone.de ([127.0.0.1]) by localhost (xsmail-dmz7.prod.vfnet.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xOpXCsG59W5a for ; Tue, 26 Aug 2014 18:35:11 +0200 (CEST) In-Reply-To: <1409070910-2549-1-git-send-email-deathsimple@vodafone.de> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org From: Alex Deucher If the display hw was reset or a hard reset was used, we need to re-init some of the common display hardware as well. Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org --- drivers/gpu/drm/radeon/radeon_device.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index d2ff12e..b6aee40 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -1683,6 +1683,7 @@ int radeon_gpu_reset(struct radeon_device *rdev) /* block TTM */ resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev); radeon_suspend(rdev); + radeon_hpd_fini(rdev); for (i = 0; i < RADEON_NUM_RINGS; ++i) { ring_sizes[i] = radeon_ring_backup(rdev, &rdev->ring[i], @@ -1739,6 +1740,21 @@ retry: radeon_pm_resume(rdev); } + /* init dig PHYs, disp eng pll */ + if (rdev->is_atom_bios) { + radeon_atom_encoder_init(rdev); + radeon_atom_disp_eng_pll_init(rdev); + /* turn on the BL */ + if (rdev->mode_info.bl_encoder) { + u8 bl_level = radeon_get_backlight_level(rdev, + rdev->mode_info.bl_encoder); + radeon_set_backlight_level(rdev, rdev->mode_info.bl_encoder, + bl_level); + } + } + /* reset hpd state */ + radeon_hpd_init(rdev); + drm_helper_resume_force_mode(rdev->ddev); /* set the power state here in case we are a PX system or headless */ -- 1.9.1