From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex Deucher Subject: [PATCH] drm/radeon: soft reset uvd on RV770 uvd init Date: Tue, 26 Aug 2014 23:04:10 -0400 Message-ID: <1409108650-2130-1-git-send-email-alexander.deucher@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-qc0-f174.google.com (mail-qc0-f174.google.com [209.85.216.174]) by gabe.freedesktop.org (Postfix) with ESMTP id 810D56E1C4 for ; Tue, 26 Aug 2014 20:04:18 -0700 (PDT) Received: by mail-qc0-f174.google.com with SMTP id l6so16355564qcy.5 for ; Tue, 26 Aug 2014 20:04:18 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org Cc: Alex Deucher List-Id: dri-devel@lists.freedesktop.org Fixes avoids and error message on boot which is harmless, but confusing to users. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/uvd_v1_0.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c index e251624..82e4fa6 100644 --- a/drivers/gpu/drm/radeon/uvd_v1_0.c +++ b/drivers/gpu/drm/radeon/uvd_v1_0.c @@ -325,6 +325,13 @@ int uvd_v1_0_start(struct radeon_device *rdev) WREG32_P(UVD_RB_ARB_CTRL, 0, ~(1 << 3)); + if (rdev->family == CHIP_RV770) { + WREG32_P(UVD_SOFT_RESET, VCPU_SOFT_RESET, ~VCPU_SOFT_RESET); + mdelay(10); + WREG32_P(UVD_SOFT_RESET, 0, ~VCPU_SOFT_RESET); + mdelay(10); + } + for (i = 0; i < 10; ++i) { uint32_t status; for (j = 0; j < 100; ++j) { -- 1.8.3.1