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From: "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com>
To: "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "Gupta, Anshuman" <anshuman.gupta@intel.com>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"Vivi, Rodrigo" <rodrigo.vivi@intel.com>
Subject: Re: [PATCH] drm/i915/gsc: Fix the Driver-FLR completion
Date: Fri, 24 Feb 2023 00:05:09 +0000	[thread overview]
Message-ID: <141a1bf26c866c3f51707e834fe18098812300af.camel@intel.com> (raw)
In-Reply-To: <f15e26d3-fde2-acba-fb2f-2363e8c66d1c@intel.com>

Thanks Daniele, you are right about the fixes tag - i totally forgot that MTL is still force-probe.
Will respin with the bit definition fix, remove the fixes-tag and leave out the get/put runtime-pm from rev3 (as per your comment on rev3).
Rev4 coming right up.

...alan

P.S. I had the same thought process about the dual-poll-waiting timeout - but based on my discussions with the hw folk and what is the now-updated hw specs, we start to understand
that depending on the SOC implementation fabric (outside the GPU IP), we will most likely have the longer polling one either one of those bits but not both. But since that's
outside the GPU-IP, its just more scalable to keep both these polls.


On Thu, 2023-02-23 at 15:49 -0800, Ceraolo Spurio, Daniele wrote:
> 
> On 2/22/2023 1:01 PM, Alan Previn wrote:
> > 
alan:snip


  reply	other threads:[~2023-02-24  0:05 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-22 21:01 [PATCH] drm/i915/gsc: Fix the Driver-FLR completion Alan Previn
2023-02-23  1:41 ` [Intel-gfx] " Belgaumkar, Vinay
2023-02-23 21:48 ` Teres Alexis, Alan Previn
2023-02-23 23:49 ` Ceraolo Spurio, Daniele
2023-02-24  0:05   ` Teres Alexis, Alan Previn [this message]
  -- strict thread matches above, loose matches on Subject: below --
2023-02-23 22:04 Alan Previn
2023-02-23 23:35 ` Ceraolo Spurio, Daniele
2023-02-24  0:17 Alan Previn

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