From: Shashank Sharma <shashank.sharma@intel.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
emil.l.velikov@gmail.com, matthew.d.roper@intel.com,
robert.bradford@intel.com, jim.bish@intel.com
Cc: annie.j.matheson@intel.com, avinash.reddy.palleti@intel.com,
indranil.mukherjee@intel.com, kausalmalladi@gmail.com,
kiran.s.kumar@intel.com, daniel.vetter@intel.com,
=gary.k.smith@intel.com
Subject: [PATCH v5 20/22] drm/i915: BDW: Load degamma correction values
Date: Tue, 13 Oct 2015 18:09:55 +0530 [thread overview]
Message-ID: <1444739997-24831-21-git-send-email-shashank.sharma@intel.com> (raw)
In-Reply-To: <1444739997-24831-1-git-send-email-shashank.sharma@intel.com>
I915 color manager registers pipe degamma correction as palette
correction before CTM, DRM property.
This patch adds the no of coefficients(512) for degamma correction
as "num_samples_before_ctm" parameter in device info structures,
for BDW and higher platforms.
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Kausal Malladi <kausalmalladi@gmail.com>
---
drivers/gpu/drm/i915/i915_drv.c | 7 +++++++
drivers/gpu/drm/i915/intel_color_manager.h | 3 +++
2 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 8beac5c..1c68e91 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -303,6 +303,7 @@ static const struct intel_device_info intel_broadwell_d_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.num_samples_after_ctm = BDW_SPLITGAMMA_MAX_VALS,
+ .num_samples_before_ctm = BDW_DEGAMMA_MAX_VALS,
.has_llc = 1,
.has_ddi = 1,
.has_fpga_dbg = 1,
@@ -316,6 +317,7 @@ static const struct intel_device_info intel_broadwell_m_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.num_samples_after_ctm = BDW_SPLITGAMMA_MAX_VALS,
+ .num_samples_before_ctm = BDW_DEGAMMA_MAX_VALS,
.has_llc = 1,
.has_ddi = 1,
.has_fpga_dbg = 1,
@@ -329,6 +331,7 @@ static const struct intel_device_info intel_broadwell_gt3d_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
.num_samples_after_ctm = BDW_SPLITGAMMA_MAX_VALS,
+ .num_samples_before_ctm = BDW_DEGAMMA_MAX_VALS,
.has_llc = 1,
.has_ddi = 1,
.has_fpga_dbg = 1,
@@ -342,6 +345,7 @@ static const struct intel_device_info intel_broadwell_gt3m_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
.num_samples_after_ctm = BDW_SPLITGAMMA_MAX_VALS,
+ .num_samples_before_ctm = BDW_DEGAMMA_MAX_VALS,
.has_llc = 1,
.has_ddi = 1,
.has_fpga_dbg = 1,
@@ -368,6 +372,7 @@ static const struct intel_device_info intel_skylake_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.num_samples_after_ctm = BDW_SPLITGAMMA_MAX_VALS,
+ .num_samples_before_ctm = BDW_DEGAMMA_MAX_VALS,
.has_llc = 1,
.has_ddi = 1,
.has_fpga_dbg = 1,
@@ -382,6 +387,7 @@ static const struct intel_device_info intel_skylake_gt3_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
.num_samples_after_ctm = BDW_SPLITGAMMA_MAX_VALS,
+ .num_samples_before_ctm = BDW_DEGAMMA_MAX_VALS,
.has_llc = 1,
.has_ddi = 1,
.has_fpga_dbg = 1,
@@ -396,6 +402,7 @@ static const struct intel_device_info intel_broxton_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.num_samples_after_ctm = BDW_SPLITGAMMA_MAX_VALS,
+ .num_samples_before_ctm = BDW_DEGAMMA_MAX_VALS,
.num_pipes = 3,
.has_ddi = 1,
.has_fpga_dbg = 1,
diff --git a/drivers/gpu/drm/i915/intel_color_manager.h b/drivers/gpu/drm/i915/intel_color_manager.h
index 6c7cb08..e0c486e 100644
--- a/drivers/gpu/drm/i915/intel_color_manager.h
+++ b/drivers/gpu/drm/i915/intel_color_manager.h
@@ -98,3 +98,6 @@
#define BDW_MAX_GAMMA ((1 << 24) - 1)
#define BDW_INDEX_AUTO_INCREMENT (1 << 15)
#define BDW_INDEX_SPLIT_MODE (1 << 31)
+
+/* Degamma on BDW */
+#define BDW_DEGAMMA_MAX_VALS 512
--
1.9.1
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next prev parent reply other threads:[~2015-10-13 12:39 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-13 12:39 [PATCH v5 00/22] Color Management for DRM Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 01/22] drm: Create Color Management DRM properties Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 02/22] drm: Create Color Management query properties Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 03/22] drm: Add color correction blobs in CRTC state Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 04/22] drm: Add set property support for color manager Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 05/22] drm: Add get " Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 06/22] drm: Add drm structures for palette color property Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 07/22] drm: Add structure to set/get a CTM " Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 08/22] drm/i915: Add set property interface for CRTC Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 09/22] drm/i915: Create color management files Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 10/22] drm/i915: Register color correction capabilities Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 11/22] drm/i915: CHV: Load gamma color correction values Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 12/22] drm/i915: CHV: Load degamma " Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 13/22] drm/i915: CHV: Pipe level Gamma correction Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 14/22] drm/i915: CHV: Pipe level degamma correction Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 15/22] drm/i915: CHV: Pipe level CSC correction Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 16/22] drm/i915: Commit color correction to CRTC Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 17/22] drm/i915: Attach color properties " Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 18/22] drm/i915: BDW: Load gamma correction values Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 19/22] drm/i915: BDW: Pipe level Gamma correction Shashank Sharma
2015-10-13 12:39 ` Shashank Sharma [this message]
2015-10-13 12:39 ` [PATCH v5 21/22] drm/i915: BDW: Pipe level degamma correction Shashank Sharma
2015-10-13 12:39 ` [PATCH v5 22/22] drm/i915: BDW: Pipe level CSC correction Shashank Sharma
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