From: Alex Deucher <alexdeucher@gmail.com>
To: dri-devel@lists.freedesktop.org
Cc: Alex Deucher <alexander.deucher@amd.com>
Subject: [PATCH 3/5] drm/amdgpu/cgs: add sys info query for pcie gen and link width
Date: Thu, 12 Nov 2015 11:48:14 -0500 [thread overview]
Message-ID: <1447346896-1577-3-git-send-email-alexander.deucher@amd.com> (raw)
In-Reply-To: <1447346896-1577-1-git-send-email-alexander.deucher@amd.com>
Needed by powerplay to properly handle pcie dpm switching.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 6 ++++++
drivers/gpu/drm/amd/include/cgs_common.h | 2 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index a611401a..6fa0fea 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -754,6 +754,12 @@ static int amdgpu_cgs_query_system_info(void *cgs_device,
case CGS_SYSTEM_INFO_ADAPTER_BDF_ID:
sys_info->value = adev->pdev->devfn | (adev->pdev->bus->number << 8);
break;
+ case CGS_SYSTEM_INFO_PCIE_GEN_INFO:
+ sys_info->value = adev->pm.pcie_gen_mask;
+ break;
+ case CGS_SYSTEM_INFO_PCIE_MLW:
+ sys_info->value = adev->pm.pcie_mlw_mask;
+ break;
default:
return -ENODEV;
}
diff --git a/drivers/gpu/drm/amd/include/cgs_common.h b/drivers/gpu/drm/amd/include/cgs_common.h
index 2bbffd1..03affb3 100644
--- a/drivers/gpu/drm/amd/include/cgs_common.h
+++ b/drivers/gpu/drm/amd/include/cgs_common.h
@@ -107,6 +107,8 @@ enum cgs_ucode_id {
enum cgs_system_info_id {
CGS_SYSTEM_INFO_ADAPTER_BDF_ID = 1,
+ CGS_SYSTEM_INFO_PCIE_GEN_INFO,
+ CGS_SYSTEM_INFO_PCIE_MLW,
CGS_SYSTEM_INFO_ID_MAXIMUM,
};
--
1.8.3.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2015-11-12 16:48 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-12 16:48 [PATCH 1/5] drm: add drm_pcie_get_max_link_width helper Alex Deucher
2015-11-12 16:48 ` [PATCH 2/5] drm/amdgpu: store pcie gen mask and link width Alex Deucher
2015-11-12 16:48 ` Alex Deucher [this message]
2015-11-12 16:48 ` [PATCH 4/5] drm/amdgpu/powerplay/tonga: query supported pcie info from cgs (v2) Alex Deucher
2015-11-12 16:48 ` [PATCH 5/5] drm/amdgpu/powerplay/fiji: " Alex Deucher
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1447346896-1577-3-git-send-email-alexander.deucher@amd.com \
--to=alexdeucher@gmail.com \
--cc=alexander.deucher@amd.com \
--cc=dri-devel@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox