From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mario Kleiner Subject: [PATCH 1/2] drm/i915/dp: Revert "drm/i915/dp: fall back to 18 bpp when sink capability is unknown" Date: Thu, 26 May 2016 16:39:03 +0200 Message-ID: <1464273544-23834-2-git-send-email-mario.kleiner.de@gmail.com> References: <1464273544-23834-1-git-send-email-mario.kleiner.de@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: In-Reply-To: <1464273544-23834-1-git-send-email-mario.kleiner.de@gmail.com> Sender: stable-owner@vger.kernel.org To: dri-devel@lists.freedesktop.org Cc: mario.kleiner.de@gmail.com, stable@vger.kernel.org, =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Daniel Vetter List-Id: dri-devel@lists.freedesktop.org This reverts commit 013dd9e03872 ("drm/i915/dp: fall back to 18 bpp when sink capability is unknown") This commit introduced a regression into stable kernels, as it reduces output color depth to 6 bpc for any video sink connected to a Displayport connector if that sink doesn't report a specific color depth via EDID, or if our EDID parser doesn't actually recognize the proper bpc from EDID. Affected are active DisplayPort->VGA converters and active DisplayPort->DVI converters. Both should be able to handle 8 bpc, but are degraded to 6 bpc with this patch. The reverted commit was meant to fix Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=3D105331 A followup patch implements a fix for that specific bug, which is caused by a faulty EDID of the affected DP panel by adding a new EDID quirk for that panel. DP 18 bpp fallback handling and other improvements to DP sink bpc detection will be handled for future kernels in a separate series of patches. Please backport to stable. Signed-off-by: Mario Kleiner Acked-by: Jani Nikula Cc: stable@vger.kernel.org Cc: Ville Syrj=C3=A4l=C3=A4 Cc: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 20 +++++--------------- 1 file changed, 5 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i91= 5/intel_display.c index 46f9be3..3a57fa1 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -12066,21 +12066,11 @@ connected_sink_compute_bpp(struct intel_conne= ctor *connector, pipe_config->pipe_bpp =3D connector->base.display_info.bpc*3; } =20 - /* Clamp bpp to default limit on screens without EDID 1.4 */ - if (connector->base.display_info.bpc =3D=3D 0) { - int type =3D connector->base.connector_type; - int clamp_bpp =3D 24; - - /* Fall back to 18 bpp when DP sink capability is unknown. */ - if (type =3D=3D DRM_MODE_CONNECTOR_DisplayPort || - type =3D=3D DRM_MODE_CONNECTOR_eDP) - clamp_bpp =3D 18; - - if (bpp > clamp_bpp) { - DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of %d= \n", - bpp, clamp_bpp); - pipe_config->pipe_bpp =3D clamp_bpp; - } + /* Clamp bpp to 8 on screens without EDID 1.4 */ + if (connector->base.display_info.bpc =3D=3D 0 && bpp > 24) { + DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of 24\= n", + bpp); + pipe_config->pipe_bpp =3D 24; } } =20 --=20 2.7.0