From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dhinakaran Pandiyan Subject: [PATCH 3/4] drm/dp: Clarify clock recovery and channel equalization failures Date: Wed, 3 Aug 2016 20:07:40 -0700 Message-ID: <1470280061-640-4-git-send-email-dhinakaran.pandiyan@intel.com> References: <1470280061-640-1-git-send-email-dhinakaran.pandiyan@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1470280061-640-1-git-send-email-dhinakaran.pandiyan@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: Dhinakaran Pandiyan , dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org VGhlIGNhdXNlcyBvZiBjbG9jayByZWNvdmVyeSBhbmQgY2hhbm5lbCBlcXVhbGl6YXRpb24gZmFp bHVyZXMgYXJlIG5vdApleHBsaWNpdGx5IHByaW50ZWQgaW4gZGVidWcgbWVzc2FnZXMuIEhlbHAg ZGVidWdnaW5nIGxpbmsgdHJhaW5pbmcKZmFpbHVyZXMgYnkgcHJpbnRpbmcgd2h5IGl0IGZhaWxl ZC4KCkRvaW5nIHRoaXMgaW4gdGhlIGRyaXZlciB3b3VsZCBtZWFuIHJlLWltcGxlbWVudGluZyBz b21lIG9mIHRoZSBkcm0gc3RhdGljCmZ1bmN0aW9ucyB0aGF0IGRlY29kZSBsaW5rIHN0YXR1cy4g TGV0J3MgYXZvaWQgdGhhdCB3aXRoIHRoZXNlIGRlYnVnCm1lc3NhZ2VzIGluIGRybS4KClNpZ25l ZC1vZmYtYnk6IERoaW5ha2FyYW4gUGFuZGl5YW4gPGRoaW5ha2FyYW4ucGFuZGl5YW5AaW50ZWwu Y29tPgotLS0KIGRyaXZlcnMvZ3B1L2RybS9kcm1fZHBfaGVscGVyLmMgfCAxMiArKysrKysrKyst LS0KIDEgZmlsZSBjaGFuZ2VkLCA5IGluc2VydGlvbnMoKyksIDMgZGVsZXRpb25zKC0pCgpkaWZm IC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2RybV9kcF9oZWxwZXIuYyBiL2RyaXZlcnMvZ3B1L2Ry bS9kcm1fZHBfaGVscGVyLmMKaW5kZXggMDkxMDUzZS4uZDc2M2I1NyAxMDA2NDQKLS0tIGEvZHJp dmVycy9ncHUvZHJtL2RybV9kcF9oZWxwZXIuYworKysgYi9kcml2ZXJzL2dwdS9kcm0vZHJtX2Rw X2hlbHBlci5jCkBAIC02NCwxMiArNjQsMTYgQEAgYm9vbCBkcm1fZHBfY2hhbm5lbF9lcV9vayhj b25zdCB1OCBsaW5rX3N0YXR1c1tEUF9MSU5LX1NUQVRVU19TSVpFXSwKIAogCWxhbmVfYWxpZ24g PSBkcF9saW5rX3N0YXR1cyhsaW5rX3N0YXR1cywKIAkJCQkgICAgRFBfTEFORV9BTElHTl9TVEFU VVNfVVBEQVRFRCk7Ci0JaWYgKChsYW5lX2FsaWduICYgRFBfSU5URVJMQU5FX0FMSUdOX0RPTkUp ID09IDApCisJaWYgKChsYW5lX2FsaWduICYgRFBfSU5URVJMQU5FX0FMSUdOX0RPTkUpID09IDAp IHsKKwkJRFJNX0RFQlVHX0tNUygiSW50ZXItbGFuZSBhbGlnbm1lbnQgbm90IGRvbmVcbiIpOwog CQlyZXR1cm4gZmFsc2U7CisJfQogCWZvciAobGFuZSA9IDA7IGxhbmUgPCBsYW5lX2NvdW50OyBs YW5lKyspIHsKIAkJbGFuZV9zdGF0dXMgPSBkcF9nZXRfbGFuZV9zdGF0dXMobGlua19zdGF0dXMs IGxhbmUpOwotCQlpZiAoKGxhbmVfc3RhdHVzICYgRFBfQ0hBTk5FTF9FUV9CSVRTKSAhPSBEUF9D SEFOTkVMX0VRX0JJVFMpCisJCWlmICgobGFuZV9zdGF0dXMgJiBEUF9DSEFOTkVMX0VRX0JJVFMp ICE9IERQX0NIQU5ORUxfRVFfQklUUykgeworCQkJRFJNX0RFQlVHX0tNUygiQ2hhbm5lbCBlcXVh bGl6YXRpb24gbm90IGRvbmUgZm9yIGxhbmUgJWRcbiIsIGxhbmUpOwogCQkJcmV0dXJuIGZhbHNl OworCQl9CiAJfQogCXJldHVybiB0cnVlOwogfQpAQCAtODMsOCArODcsMTAgQEAgYm9vbCBkcm1f ZHBfY2xvY2tfcmVjb3Zlcnlfb2soY29uc3QgdTggbGlua19zdGF0dXNbRFBfTElOS19TVEFUVVNf U0laRV0sCiAKIAlmb3IgKGxhbmUgPSAwOyBsYW5lIDwgbGFuZV9jb3VudDsgbGFuZSsrKSB7CiAJ CWxhbmVfc3RhdHVzID0gZHBfZ2V0X2xhbmVfc3RhdHVzKGxpbmtfc3RhdHVzLCBsYW5lKTsKLQkJ aWYgKChsYW5lX3N0YXR1cyAmIERQX0xBTkVfQ1JfRE9ORSkgPT0gMCkKKwkJaWYgKChsYW5lX3N0 YXR1cyAmIERQX0xBTkVfQ1JfRE9ORSkgPT0gMCkgeworCQkJRFJNX0RFQlVHX0tNUygiQ2xvY2sg cmVjb3Zlcnkgbm90IGRvbmUgZm9yIGxhbmUgJWRcbiIsIGxhbmUpOwogCQkJcmV0dXJuIGZhbHNl OworCQl9CiAJfQogCXJldHVybiB0cnVlOwogfQotLSAKMi41LjAKCl9fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50 ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9y Zy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo=