From: Paulo Zanoni <paulo.r.zanoni@intel.com>
To: Lyude <cpaul@redhat.com>, intel-gfx@lists.freedesktop.org
Cc: David Airlie <airlied@linux.ie>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Daniel Vetter <daniel.vetter@intel.com>
Subject: Re: [Intel-gfx] [PATCH 2/6] drm/i915/skl: Remove linetime from skl_wm_values
Date: Wed, 05 Oct 2016 17:24:41 -0300 [thread overview]
Message-ID: <1475699081.2381.56.camel@intel.com> (raw)
In-Reply-To: <1475681598-12081-3-git-send-email-cpaul@redhat.com>
Em Qua, 2016-10-05 às 11:33 -0400, Lyude escreveu:
> Next part of cleaning up the watermark code for skl. This is easy,
> since
> it seems that we never actually needed to keep track of the linetime
> in
> the skl_wm_values struct anyway.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> Signed-off-by: Lyude <cpaul@redhat.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 -
> drivers/gpu/drm/i915/intel_display.c | 6 ++++--
> drivers/gpu/drm/i915/intel_pm.c | 7 +------
> 3 files changed, 5 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index 85e541c..d26e5999 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1643,7 +1643,6 @@ struct skl_ddb_allocation {
> struct skl_wm_values {
> unsigned dirty_pipes;
> struct skl_ddb_allocation ddb;
> - uint32_t wm_linetime[I915_MAX_PIPES];
> uint32_t plane[I915_MAX_PIPES][I915_MAX_PLANES][8];
> uint32_t plane_trans[I915_MAX_PIPES][I915_MAX_PLANES];
> };
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 17733af..a71d05a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14832,6 +14832,8 @@ static void intel_begin_crtc_commit(struct
> drm_crtc *crtc,
> struct drm_device *dev = crtc->dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> + struct intel_crtc_state *intel_cstate =
> + to_intel_crtc_state(crtc->state);
> struct intel_crtc_state *old_intel_state =
> to_intel_crtc_state(old_crtc_state);
> bool modeset = needs_modeset(crtc->state);
> @@ -14848,13 +14850,13 @@ static void intel_begin_crtc_commit(struct
> drm_crtc *crtc,
> intel_color_load_luts(crtc->state);
> }
>
> - if (to_intel_crtc_state(crtc->state)->update_pipe)
> + if (intel_cstate->update_pipe)
> intel_update_pipe_config(intel_crtc,
> old_intel_state);
> else if (INTEL_GEN(dev_priv) >= 9) {
> skl_detach_scalers(intel_crtc);
>
> I915_WRITE(PIPE_WM_LINETIME(pipe),
> - dev_priv->wm.skl_hw.wm_linetime[pipe]);
> + intel_cstate->wm.skl.optimal.linetime);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 0383516..af96888 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3839,8 +3839,6 @@ static void skl_compute_wm_results(struct
> drm_device *dev,
> temp |= PLANE_WM_EN;
>
> r->plane_trans[pipe][PLANE_CURSOR] = temp;
> -
> - r->wm_linetime[pipe] = p_wm->linetime;
> }
>
> static void skl_ddb_entry_write(struct drm_i915_private *dev_priv,
> @@ -4069,7 +4067,6 @@ skl_copy_wm_for_pipe(struct skl_wm_values *dst,
> struct skl_wm_values *src,
> enum pipe pipe)
> {
> - dst->wm_linetime[pipe] = src->wm_linetime[pipe];
> memcpy(dst->plane[pipe], src->plane[pipe],
> sizeof(dst->plane[pipe]));
> memcpy(dst->plane_trans[pipe], src->plane_trans[pipe],
> @@ -4320,8 +4317,6 @@ static void skl_pipe_wm_get_hw_state(struct
> drm_crtc *crtc)
>
> max_level = ilk_wm_max_level(dev);
>
> - hw->wm_linetime[pipe] = I915_READ(PIPE_WM_LINETIME(pipe));
> -
> for (level = 0; level <= max_level; level++) {
> for (i = 0; i < intel_num_planes(intel_crtc); i++)
> hw->plane[pipe][i][level] =
> @@ -4338,7 +4333,7 @@ static void skl_pipe_wm_get_hw_state(struct
> drm_crtc *crtc)
>
> hw->dirty_pipes |= drm_crtc_mask(crtc);
>
> - active->linetime = hw->wm_linetime[pipe];
> + active->linetime = I915_READ(PIPE_WM_LINETIME(pipe));
>
> for (level = 0; level <= max_level; level++) {
> for (i = 0; i < intel_num_planes(intel_crtc); i++) {
next prev parent reply other threads:[~2016-10-05 20:24 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-05 15:33 [PATCH 0/6] Start of skl watermark cleanup Lyude
2016-10-05 15:33 ` [PATCH 1/6] drm/i915/skl: Move per-pipe ddb allocations into crtc states Lyude
2016-10-05 20:23 ` Paulo Zanoni
2016-10-05 15:33 ` [PATCH 2/6] drm/i915/skl: Remove linetime from skl_wm_values Lyude
2016-10-05 20:24 ` Paulo Zanoni [this message]
2016-10-05 15:33 ` [PATCH 3/6] drm/i915: Add enable_sagv option Lyude
2016-10-05 19:32 ` Paulo Zanoni
2016-10-05 15:33 ` [PATCH 4/6] drm/i915/gen9: Make skl_wm_level per-plane Lyude
2016-10-05 20:33 ` Paulo Zanoni
2016-10-06 10:38 ` Maarten Lankhorst
2016-10-05 15:33 ` [PATCH 5/6] drm/i915/gen9: Get rid of redundant watermark values Lyude
2016-10-05 21:44 ` Paulo Zanoni
2016-10-05 21:53 ` [Intel-gfx] " Chris Wilson
2016-10-05 15:33 ` [PATCH 6/6] drm/i915/gen9: Add ddb changes to atomic debug output Lyude
2016-10-06 11:25 ` [PATCH 0/6] Start of skl watermark cleanup Maarten Lankhorst
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