From: Paulo Zanoni <paulo.r.zanoni@intel.com>
To: Lyude <cpaul@redhat.com>, intel-gfx@lists.freedesktop.org
Cc: David Airlie <airlied@linux.ie>,
Daniel Vetter <daniel.vetter@intel.com>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 04/10] drm/i915/gen9: Cleanup skl_pipe_wm_active_state
Date: Tue, 11 Oct 2016 16:40:33 -0300 [thread overview]
Message-ID: <1476214833.2460.19.camel@intel.com> (raw)
In-Reply-To: <1475885497-6094-5-git-send-email-cpaul@redhat.com>
Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
> This function is a wreck, let's help it get it's life back together
> and
> cleanup all of the copy pasta here.
s/it's/its/
Idea for your next patch series: rename skl_pipe_wm_active_state()'s
"i" parameter to something more meaningful.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> (adding Maarten's reviewed-by since this is just a split-up version
> of one
> of the previous patches)
>
> Signed-off-by: Lyude <cpaul@redhat.com>
> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 52 +++++++++++------------------
> ------------
> 1 file changed, 14 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 4c2ebcd..5dbaf12 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4267,46 +4267,22 @@ static void ilk_optimize_watermarks(struct
> intel_crtc_state *cstate)
> static void skl_pipe_wm_active_state(uint32_t val,
> struct skl_pipe_wm *active,
> bool is_transwm,
> - bool is_cursor,
> int i,
> int level)
> {
> + struct skl_plane_wm *plane_wm = &active->planes[i];
> bool is_enabled = (val & PLANE_WM_EN) != 0;
>
> if (!is_transwm) {
> - if (!is_cursor) {
> - active->planes[i].wm[level].plane_en =
> is_enabled;
> - active->planes[i].wm[level].plane_res_b =
> - val & PLANE_WM_BLOCKS_MASK;
> - active->planes[i].wm[level].plane_res_l =
> - (val >> PLANE_WM_LINES_SHIFT) &
> - PLANE_WM_LINES_MASK;
> - } else {
> - active-
> >planes[PLANE_CURSOR].wm[level].plane_en =
> - is_enabled;
> - active-
> >planes[PLANE_CURSOR].wm[level].plane_res_b =
> - val & PLANE_WM_BLOCKS_MASK;
> - active-
> >planes[PLANE_CURSOR].wm[level].plane_res_l =
> - (val >> PLANE_WM_LINES_SHIFT) &
> - PLANE_WM_LINES_MASK;
> - }
> + plane_wm->wm[level].plane_en = is_enabled;
> + plane_wm->wm[level].plane_res_b = val &
> PLANE_WM_BLOCKS_MASK;
> + plane_wm->wm[level].plane_res_l =
> + (val >> PLANE_WM_LINES_SHIFT) &
> PLANE_WM_LINES_MASK;
> } else {
> - if (!is_cursor) {
> - active->planes[i].trans_wm.plane_en =
> is_enabled;
> - active->planes[i].trans_wm.plane_res_b =
> - val & PLANE_WM_BLOCKS_MASK;
> - active->planes[i].trans_wm.plane_res_l =
> - (val >> PLANE_WM_LINES_SHIFT) &
> - PLANE_WM_LINES_MASK;
> - } else {
> - active-
> >planes[PLANE_CURSOR].trans_wm.plane_en =
> - is_enabled;
> - active-
> >planes[PLANE_CURSOR].trans_wm.plane_res_b =
> - val & PLANE_WM_BLOCKS_MASK;
> - active-
> >planes[PLANE_CURSOR].trans_wm.plane_res_l =
> - (val >> PLANE_WM_LINES_SHIFT) &
> - PLANE_WM_LINES_MASK;
> - }
> + plane_wm->trans_wm.plane_en = is_enabled;
> + plane_wm->trans_wm.plane_res_b = val &
> PLANE_WM_BLOCKS_MASK;
> + plane_wm->trans_wm.plane_res_l =
> + (val >> PLANE_WM_LINES_SHIFT) &
> PLANE_WM_LINES_MASK;
> }
> }
>
> @@ -4345,20 +4321,20 @@ static void skl_pipe_wm_get_hw_state(struct
> drm_crtc *crtc)
> for (level = 0; level <= max_level; level++) {
> for (i = 0; i < intel_num_planes(intel_crtc); i++) {
> temp = hw->plane[pipe][i][level];
> - skl_pipe_wm_active_state(temp, active,
> false,
> - false, i, level);
> + skl_pipe_wm_active_state(temp, active,
> false, i, level);
> }
> temp = hw->plane[pipe][PLANE_CURSOR][level];
> - skl_pipe_wm_active_state(temp, active, false, true,
> i, level);
> + skl_pipe_wm_active_state(temp, active, false,
> PLANE_CURSOR,
> + level);
> }
>
> for (i = 0; i < intel_num_planes(intel_crtc); i++) {
> temp = hw->plane_trans[pipe][i];
> - skl_pipe_wm_active_state(temp, active, true, false,
> i, 0);
> + skl_pipe_wm_active_state(temp, active, true, i, 0);
> }
>
> temp = hw->plane_trans[pipe][PLANE_CURSOR];
> - skl_pipe_wm_active_state(temp, active, true, true, i, 0);
> + skl_pipe_wm_active_state(temp, active, true, PLANE_CURSOR,
> 0);
>
> intel_crtc->wm.active.skl = *active;
> }
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next prev parent reply other threads:[~2016-10-11 19:40 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-08 0:11 [PATCH v2 00/10] Start of skl watermark cleanup Lyude
2016-10-08 0:11 ` [PATCH v2 01/10] drm/i915/skl: Move per-pipe ddb allocations into crtc states Lyude
2016-10-11 19:36 ` Paulo Zanoni
2016-10-08 0:11 ` [PATCH v2 02/10] drm/i915/skl: Remove linetime from skl_wm_values Lyude
2016-10-08 0:11 ` [PATCH v2 03/10] drm/i915/gen9: Make skl_wm_level per-plane Lyude
2016-10-11 19:36 ` Paulo Zanoni
2016-10-08 0:11 ` [PATCH 04/10] drm/i915/gen9: Cleanup skl_pipe_wm_active_state Lyude
2016-10-11 19:40 ` Paulo Zanoni [this message]
2016-10-08 0:11 ` [PATCH v2 05/10] drm/i915/gen9: Get rid of redundant watermark values Lyude
2016-10-13 13:39 ` [Intel-gfx] " Maarten Lankhorst
2016-10-13 20:04 ` Paulo Zanoni
2016-10-13 20:07 ` Paulo Zanoni
2016-10-13 21:25 ` [Intel-gfx] " Lyude Paul
2016-10-17 6:05 ` Daniel Vetter
2016-10-17 8:07 ` Maarten Lankhorst
2016-10-08 0:11 ` [PATCH v2 06/10] drm/i915/gen9: Add ddb changes to atomic debug output Lyude
2016-10-13 20:17 ` Paulo Zanoni
2016-10-08 0:11 ` [PATCH 07/10] drm/i915/gen9: Make skl_pipe_wm_get_hw_state() reusable Lyude
2016-10-13 20:36 ` Paulo Zanoni
2016-10-08 0:11 ` [PATCH 08/10] drm/i915/gen9: Add skl_wm_level_equals() Lyude
2016-10-13 20:40 ` Paulo Zanoni
2016-10-08 0:11 ` [PATCH 09/10] drm/i915/gen9: Actually verify WM levels in verify_wm_state() Lyude
2016-10-13 21:15 ` Paulo Zanoni
2016-10-13 21:20 ` Paulo Zanoni
2016-10-08 0:11 ` [PATCH 10/10] drm/i915/gen9: Don't wrap strings " Lyude
2016-10-13 21:18 ` Paulo Zanoni
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