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From: Philippe CORNU <philippe.cornu@st.com>
To: Alexandre Torgue <alexandre.torgue@st.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	David Airlie <airlied@linux.ie>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	Mark Rutland <mark.rutland@arm.com>,
	Rob Herring <robh+dt@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
	Benjamin Gaignard <benjamin.gaignard@linaro.org>,
	Yannick Fertre <yannick.fertre@st.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Archit Taneja <architt@codeaurora.org>,
	Eric Anholt <eric@anholt.net>, Chris Zhong <zyw@rock-chips.com>,
	Andrzej Hajda <a.hajda@samsung.com>,
	Xinliang Liu <xinliang.liu@linaro.org>,
	zourongrong@gmail.com,
	Xinwei Kong <kong.kongxinwei@hisilicon.com>,
	Chen Feng <puck.chen@hisilicon.com>,
	Mark Yao <mark.yao@rock-chips.com>
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	Philippe Cornu <philippe.cornu@st.com>,
	Fabien Dessenne <fabien.dessenne@st.com>,
	dri-devel@lists.freedesktop.org,
	Mickael Reulier <mickael.reulier@st.com>,
	Vincent Abriou <vincent.abriou@st.com>,
	Gabriel Fernandez <gabriel.fernandez@st.com>,
	Ludovic Barre <ludovic.barre@st.com>
Subject: [PATCH v5 1/7] drm/stm: ltdc: Fix leak of px clk enable in some error paths
Date: Mon, 3 Jul 2017 10:41:21 +0200	[thread overview]
Message-ID: <1499071287-10414-2-git-send-email-philippe.cornu@st.com> (raw)
In-Reply-To: <1499071287-10414-1-git-send-email-philippe.cornu@st.com>

The pixel clock gets enabled early during init, since it's required
in order to read registers. This pixel clock must be disabled if
errors during this init phase.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Philippe Cornu <philippe.cornu@st.com>
---
 drivers/gpu/drm/stm/ltdc.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 5331760..7f64d5a 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -1045,13 +1045,15 @@ int ltdc_load(struct drm_device *ddev)
 
 	if (of_address_to_resource(np, 0, &res)) {
 		DRM_ERROR("Unable to get resource\n");
-		return -ENODEV;
+		ret = -ENODEV;
+		goto err;
 	}
 
 	ldev->regs = devm_ioremap_resource(dev, &res);
 	if (IS_ERR(ldev->regs)) {
 		DRM_ERROR("Unable to get ltdc registers\n");
-		return PTR_ERR(ldev->regs);
+		ret = PTR_ERR(ldev->regs);
+		goto err;
 	}
 
 	for (i = 0; i < MAX_IRQ; i++) {
@@ -1064,7 +1066,7 @@ int ltdc_load(struct drm_device *ddev)
 						dev_name(dev), ddev);
 		if (ret) {
 			DRM_ERROR("Failed to register LTDC interrupt\n");
-			return ret;
+			goto err;
 		}
 	}
 
@@ -1079,7 +1081,7 @@ int ltdc_load(struct drm_device *ddev)
 	if (ret) {
 		DRM_ERROR("hardware identifier (0x%08x) not supported!\n",
 			  ldev->caps.hw_version);
-		return ret;
+		goto err;
 	}
 
 	DRM_INFO("ltdc hw version 0x%08x - ready\n", ldev->caps.hw_version);
-- 
1.9.1

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  reply	other threads:[~2017-07-03  8:46 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-03  8:41 [PATCH v5 0/7] STM32 DSI HOST Philippe CORNU
2017-07-03  8:41 ` Philippe CORNU [this message]
2017-07-03  8:41 ` [PATCH v5 2/7] drm/stm: ltdc: Add panel-bridge support Philippe CORNU
2017-07-03  8:41 ` [PATCH v5 3/7] dt-bindings: display: Add Synopsys DW MIPI DSI host controller Philippe CORNU
     [not found]   ` <1499071287-10414-4-git-send-email-philippe.cornu-qxv4g6HH51o@public.gmane.org>
2017-07-07 15:53     ` Rob Herring
2017-07-03  8:41 ` [PATCH v5 4/7] drm/bridge/synopsys: Add MIPI DSI host controller bridge Philippe CORNU
2017-07-12  6:05   ` Archit Taneja
2017-07-17  7:54     ` Philippe CORNU
2017-07-17  8:06       ` Archit Taneja
2017-07-03  8:41 ` [PATCH v5 5/7] dt-bindings: display: stm32: remove st-display-subsystem parent node requirement Philippe CORNU
2017-07-03  8:41 ` [PATCH v5 6/7] dt-bindings: display: stm32: Add DSI controller Philippe CORNU
2017-07-03  8:41 ` [PATCH v5 7/7] drm/stm: Add STM32 DSI controller driver Philippe CORNU

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