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From: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
To: dri-devel@lists.freedesktop.org
Cc: andrey.gusakov@cogentembedded.com, cphealy@gmail.com
Subject: [PATCH v2 4/7] drm/bridge: tc358767: fix timing calculations
Date: Fri,  3 Nov 2017 20:01:31 +0300	[thread overview]
Message-ID: <1509728494-23508-5-git-send-email-andrey.gusakov@cogentembedded.com> (raw)
In-Reply-To: <1509728494-23508-1-git-send-email-andrey.gusakov@cogentembedded.com>

Fields in HTIM01 and HTIM02 regs should be even.
Recomended thresh_dly value is max_tu_symbol.
---
 drivers/gpu/drm/bridge/tc358767.c |   34 ++++++++++++++++++++--------------
 1 file changed, 20 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
index 90d6b49..319d582 100644
--- a/drivers/gpu/drm/bridge/tc358767.c
+++ b/drivers/gpu/drm/bridge/tc358767.c
@@ -659,6 +659,14 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode)
 	int lower_margin = mode->vsync_start - mode->vdisplay;
 	int vsync_len = mode->vsync_end - mode->vsync_start;
 
+	/*
+	 * Recommended maximum number of symbols transferred in a transfer unit:
+	 * DIV_ROUND_UP((input active video bandwidth in bytes) * tu_size,
+	 *              (output active video bandwidth in bytes))
+	 * Must be less than tu_size.
+	 */
+	max_tu_symbol = TU_SIZE_RECOMMENDED - 1;
+
 	dev_dbg(tc->dev, "set mode %dx%d\n",
 		mode->hdisplay, mode->vdisplay);
 	dev_dbg(tc->dev, "H margin %d,%d sync %d\n",
@@ -668,13 +676,18 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode)
 	dev_dbg(tc->dev, "total: %dx%d\n", mode->htotal, mode->vtotal);
 
 
-	/* LCD Ctl Frame Size */
-	tc_write(VPCTRL0, (0x40 << 20) /* VSDELAY */ |
+	/*
+	 * LCD Ctl Frame Size
+	 * datasheet is not clear of vsdelay in case of DPI
+	 * assume we do not need any delay when DPI is a source of
+	 * sync signals
+	 */
+	tc_write(VPCTRL0, (0 << 20) /* VSDELAY */ |
 		 OPXLFMT_RGB888 | FRMSYNC_DISABLED | MSF_DISABLED);
-	tc_write(HTIM01, (left_margin << 16) |		/* H back porch */
-			 (hsync_len << 0));		/* Hsync */
-	tc_write(HTIM02, (right_margin << 16) |		/* H front porch */
-			 (mode->hdisplay << 0));	/* width */
+	tc_write(HTIM01, (ALIGN(left_margin, 2) << 16) | /* H back porch */
+			 (ALIGN(hsync_len, 2) << 0));	 /* Hsync */
+	tc_write(HTIM02, (ALIGN(right_margin, 2) << 16) |  /* H front porch */
+			 (ALIGN(mode->hdisplay, 2) << 0)); /* width */
 	tc_write(VTIM01, (upper_margin << 16) |		/* V back porch */
 			 (vsync_len << 0));		/* Vsync */
 	tc_write(VTIM02, (lower_margin << 16) |		/* V front porch */
@@ -693,7 +706,7 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode)
 	/* DP Main Stream Attributes */
 	vid_sync_dly = hsync_len + left_margin + mode->hdisplay;
 	tc_write(DP0_VIDSYNCDELAY,
-		 (0x003e << 16) |	/* thresh_dly */
+		 (max_tu_symbol << 16) |	/* thresh_dly */
 		 (vid_sync_dly << 0));
 
 	tc_write(DP0_TOTALVAL, (mode->vtotal << 16) | (mode->htotal));
@@ -709,13 +722,6 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode)
 	tc_write(DPIPXLFMT, VS_POL_ACTIVE_LOW | HS_POL_ACTIVE_LOW |
 		 DE_POL_ACTIVE_HIGH | SUB_CFG_TYPE_CONFIG1 | DPI_BPP_RGB888);
 
-	/*
-	 * Recommended maximum number of symbols transferred in a transfer unit:
-	 * DIV_ROUND_UP((input active video bandwidth in bytes) * tu_size,
-	 *              (output active video bandwidth in bytes))
-	 * Must be less than tu_size.
-	 */
-	max_tu_symbol = TU_SIZE_RECOMMENDED - 1;
 	tc_write(DP0_MISC, (max_tu_symbol << 23) | (TU_SIZE_RECOMMENDED << 16) |
 			   BPC_8);
 
-- 
1.7.10.4

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  parent reply	other threads:[~2017-11-03 17:01 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20171103170146epcas2p320108013d3b9c998fc97a7e705c73e15@epcas2p3.samsung.com>
2017-11-03 17:01 ` [PATCH v2 0/7] drm/bridge: tc358767: fixes and improvements (resend) Andrey Gusakov
2017-11-03 17:01   ` [PATCH v2 1/7] drm/bridge: tc358767: do no fail on hi-res displays Andrey Gusakov
2017-11-06  7:25     ` Andrzej Hajda
2017-11-03 17:01   ` [PATCH v2 2/7] drm/bridge: tc358767: filter out too high modes Andrey Gusakov
2017-11-06  7:50     ` Andrzej Hajda
2017-11-03 17:01   ` [PATCH v2 3/7] drm/bridge: tc358767: fix DP0_MISC register set Andrey Gusakov
2017-11-03 17:01   ` Andrey Gusakov [this message]
2017-11-03 17:01   ` [PATCH v2 5/7] drm/bridge: tc358767: fix AUXDATAn registers access Andrey Gusakov
2017-11-03 17:01   ` [PATCH v2 6/7] drm/bridge: tc358767: fix 1-lane behavior Andrey Gusakov
2017-11-03 17:01   ` [PATCH v2 7/7] drm/bridge: tc358767: add copyright lines Andrey Gusakov
2017-11-06  7:58   ` [PATCH v2 0/7] drm/bridge: tc358767: fixes and improvements (resend) Andrzej Hajda
2017-11-07  4:41     ` Archit Taneja

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