* [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature
@ 2017-12-22 22:02 Anusha Srivatsa
2017-12-22 23:39 ` Manasi Navare
0 siblings, 1 reply; 9+ messages in thread
From: Anusha Srivatsa @ 2017-12-22 22:02 UTC (permalink / raw)
To: intel-gfx; +Cc: Manasi Navare, Anusha Srivatsa, dri-devel
Forward Error Correction is supported on DP 1.4.
This patch adds corresponding DPCD register definitions.
v2: Add dri-devel mailing list to the CC list(Jani)
v3: Change names, add missing masks (Manasi)
Cc: dri-devel@lists.freedesktop.org
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
include/drm/drm_dp_helper.h | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index da58a42..4f75034 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -284,6 +284,36 @@
# define DP_DSC_BITS_PER_PIXEL_1_2 0x3
# define DP_DSC_BITS_PER_PIXEL_1 0x4
+/* DP Forward error Correction Registers */
+#define DP_FEC_CAPABILITY 0x090
+# define DP_FEC_CAPABLE (1 << 0)
+# define DP_FEC_UNCORR_BLK_ERROR_COUNT_CAP (1 << 1)
+# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP (1 << 2)
+# define DP_FEC_BIT_ERROR_COUNT_CAP (1 << 3)
+
+#define DP_FEC_CONFIGURATION 0x120
+# define DP_FEC_READY (1 << 0)
+# define DP_FEC_ERR_COUNT_DIS (0 << 1)
+# define DP_FEC_UNCORR_BLK_ERROR_COUNT (1 << 1)
+# define DP_FEC_CORR_BLK_ERROR_COUNT (2 << 1)
+# define DP_FEC_BIT_ERROR_COUNT (3 << 1)
+# define DP_FEC_ERR_COUNT_SEL_MASK (0xFF)
+# define DP_FEC_LANE_0_SELECT (0 << 4)
+# define DP_FEC_LANE_1_SELECT (1 << 4)
+# define DP_FEC_LANE_2_SELECT (2 << 4)
+# define DP_FEC_LANE_3_SELECT (3 << 4)
+
+#define DP_FEC_STATUS 0x280
+# define DP_FEC_DECODE_EN_DETECTED (1 << 0)
+# define DP_FEC_DECODE_DIS_DETECTED (1 << 1)
+
+#define DP_FEC_ERROR_COUNT_LSB 0x0281
+
+#define DP_FEC_ERROR_COUNT_MSB 0x0282
+# define DP_FEC_ERROR_COUNT_MASK 0x7F
+# define DP_FEC_ERR_COUNT_SHIFT 8
+# define DP_FEC_ERR_COUNT_VALID (1 << 7)
+
#define DP_PSR_SUPPORT 0x070 /* XXX 1.2? */
# define DP_PSR_IS_SUPPORTED 1
# define DP_PSR2_IS_SUPPORTED 2 /* eDP 1.4 */
--
2.7.4
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature
2017-12-22 22:02 [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature Anusha Srivatsa
@ 2017-12-22 23:39 ` Manasi Navare
0 siblings, 0 replies; 9+ messages in thread
From: Manasi Navare @ 2017-12-22 23:39 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx, dri-devel
On Fri, Dec 22, 2017 at 02:02:50PM -0800, Anusha Srivatsa wrote:
> Forward Error Correction is supported on DP 1.4.
> This patch adds corresponding DPCD register definitions.
>
> v2: Add dri-devel mailing list to the CC list(Jani)
>
> v3: Change names, add missing masks (Manasi)
>
> Cc: dri-devel@lists.freedesktop.org
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> include/drm/drm_dp_helper.h | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index da58a42..4f75034 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -284,6 +284,36 @@
> # define DP_DSC_BITS_PER_PIXEL_1_2 0x3
> # define DP_DSC_BITS_PER_PIXEL_1 0x4
>
> +/* DP Forward error Correction Registers */
> +#define DP_FEC_CAPABILITY 0x090
> +# define DP_FEC_CAPABLE (1 << 0)
> +# define DP_FEC_UNCORR_BLK_ERROR_COUNT_CAP (1 << 1)
> +# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP (1 << 2)
> +# define DP_FEC_BIT_ERROR_COUNT_CAP (1 << 3)
> +
> +#define DP_FEC_CONFIGURATION 0x120
> +# define DP_FEC_READY (1 << 0)
> +# define DP_FEC_ERR_COUNT_DIS (0 << 1)
> +# define DP_FEC_UNCORR_BLK_ERROR_COUNT (1 << 1)
> +# define DP_FEC_CORR_BLK_ERROR_COUNT (2 << 1)
> +# define DP_FEC_BIT_ERROR_COUNT (3 << 1)
> +# define DP_FEC_ERR_COUNT_SEL_MASK (0xFF)
This mask should be with a proper shift to obtain only the
ERR_COUNT_SEL bits. It should be (0xff << 4). See all other mask defines.
After that change,
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> +# define DP_FEC_LANE_0_SELECT (0 << 4)
> +# define DP_FEC_LANE_1_SELECT (1 << 4)
> +# define DP_FEC_LANE_2_SELECT (2 << 4)
> +# define DP_FEC_LANE_3_SELECT (3 << 4)
> +
> +#define DP_FEC_STATUS 0x280
> +# define DP_FEC_DECODE_EN_DETECTED (1 << 0)
> +# define DP_FEC_DECODE_DIS_DETECTED (1 << 1)
> +
> +#define DP_FEC_ERROR_COUNT_LSB 0x0281
> +
> +#define DP_FEC_ERROR_COUNT_MSB 0x0282
> +# define DP_FEC_ERROR_COUNT_MASK 0x7F
> +# define DP_FEC_ERR_COUNT_SHIFT 8
> +# define DP_FEC_ERR_COUNT_VALID (1 << 7)
> +
> #define DP_PSR_SUPPORT 0x070 /* XXX 1.2? */
> # define DP_PSR_IS_SUPPORTED 1
> # define DP_PSR2_IS_SUPPORTED 2 /* eDP 1.4 */
> --
> 2.7.4
>
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^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature
@ 2018-02-14 7:59 Anusha Srivatsa
2018-02-14 11:59 ` Jani Nikula
2018-02-14 19:28 ` Anusha Srivatsa
0 siblings, 2 replies; 9+ messages in thread
From: Anusha Srivatsa @ 2018-02-14 7:59 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
Forward Error Correction is supported on DP 1.4.
This patch adds corresponding DPCD register definitions.
v2: Add dri-devel mailing list to the CC list(Jani)
v3: Change names, add missing masks (Manasi)
v4: Add missing shifts to mask (Manasi)
v5: Arrange the definitions in ascending order
of the address (Jani)
Cc: dri-devel@lists.freedesktop.org
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
include/drm/drm_dp_helper.h | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index c239e6e..a19d6fb 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -329,6 +329,13 @@
# define DP_DS_12BPC 2
# define DP_DS_16BPC 3
+/* DP Forward error Correction Registers */
+#define DP_FEC_CAPABILITY (0x090)
+# define DP_FEC_CAPABLE (1 << 0)
+# define DP_FEC_UNCORR_BLK_ERROR_COUNT_CAP (1 << 1)
+# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP (1 << 2)
+# define DP_FEC_BIT_ERROR_COUNT_CAP (1 << 3)
+
/* link configuration */
#define DP_LINK_BW_SET 0x100
# define DP_LINK_RATE_TABLE 0x00 /* eDP 1.4 */
@@ -445,6 +452,18 @@
#define DP_UPSTREAM_DEVICE_DP_PWR_NEED 0x118 /* 1.2 */
# define DP_PWR_NOT_NEEDED (1 << 0)
+#define DP_FEC_CONFIGURATION 0x120
+# define DP_FEC_READY (1 << 0)
+# define DP_FEC_ERR_COUNT_DIS (0 << 1)
+# define DP_FEC_UNCORR_BLK_ERROR_COUNT (1 << 1)
+# define DP_FEC_CORR_BLK_ERROR_COUNT (2 << 1)
+# define DP_FEC_BIT_ERROR_COUNT (3 << 1)
+# define DP_FEC_ERR_COUNT_SEL_MASK (0xff << 4)
+# define DP_FEC_LANE_0_SELECT (0 << 4)
+# define DP_FEC_LANE_1_SELECT (1 << 4)
+# define DP_FEC_LANE_2_SELECT (2 << 4)
+# define DP_FEC_LANE_3_SELECT (3 << 4)
+
#define DP_AUX_FRAME_SYNC_VALUE 0x15c /* eDP 1.4 */
# define DP_AUX_FRAME_SYNC_VALID (1 << 0)
@@ -620,6 +639,17 @@
#define DP_TEST_SINK 0x270
# define DP_TEST_SINK_START (1 << 0)
+#define DP_FEC_STATUS 0x280
+# define DP_FEC_DECODE_EN_DETECTED (1 << 0)
+# define DP_FEC_DECODE_DIS_DETECTED (1 << 1)
+
+#define DP_FEC_ERROR_COUNT_LSB 0x0281
+
+#define DP_FEC_ERROR_COUNT_MSB 0x0282
+# define DP_FEC_ERROR_COUNT_MASK 0x7F
+# define DP_FEC_ERR_COUNT_SHIFT 8
+# define DP_FEC_ERR_COUNT_VALID (1 << 7)
+
#define DP_PAYLOAD_TABLE_UPDATE_STATUS 0x2c0 /* 1.2 MST */
# define DP_PAYLOAD_TABLE_UPDATED (1 << 0)
# define DP_PAYLOAD_ACT_HANDLED (1 << 1)
--
2.7.4
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature
2018-02-14 7:59 Anusha Srivatsa
@ 2018-02-14 11:59 ` Jani Nikula
2018-02-14 19:28 ` Anusha Srivatsa
1 sibling, 0 replies; 9+ messages in thread
From: Jani Nikula @ 2018-02-14 11:59 UTC (permalink / raw)
To: intel-gfx; +Cc: Manasi Navare, Anusha Srivatsa, dri-devel
On Tue, 13 Feb 2018, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> Forward Error Correction is supported on DP 1.4.
> This patch adds corresponding DPCD register definitions.
>
> v2: Add dri-devel mailing list to the CC list(Jani)
>
> v3: Change names, add missing masks (Manasi)
>
> v4: Add missing shifts to mask (Manasi)
>
> v5: Arrange the definitions in ascending order
> of the address (Jani)
Okay, my apologies, I noticed some further errors that I really should
have noticed earlier. Please see comments inline.
>
> Cc: dri-devel@lists.freedesktop.org
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> include/drm/drm_dp_helper.h | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index c239e6e..a19d6fb 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -329,6 +329,13 @@
> # define DP_DS_12BPC 2
> # define DP_DS_16BPC 3
>
> +/* DP Forward error Correction Registers */
> +#define DP_FEC_CAPABILITY (0x090)
Nitpick, the braces are unnecessary.
All the FEC dpcd offset definitions should have /* 1.4 */ at the end
(just the offset macros, not the contents).
> +# define DP_FEC_CAPABLE (1 << 0)
> +# define DP_FEC_UNCORR_BLK_ERROR_COUNT_CAP (1 << 1)
> +# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP (1 << 2)
> +# define DP_FEC_BIT_ERROR_COUNT_CAP (1 << 3)
> +
> /* link configuration */
> #define DP_LINK_BW_SET 0x100
> # define DP_LINK_RATE_TABLE 0x00 /* eDP 1.4 */
> @@ -445,6 +452,18 @@
> #define DP_UPSTREAM_DEVICE_DP_PWR_NEED 0x118 /* 1.2 */
> # define DP_PWR_NOT_NEEDED (1 << 0)
>
> +#define DP_FEC_CONFIGURATION 0x120
> +# define DP_FEC_READY (1 << 0)
> +# define DP_FEC_ERR_COUNT_DIS (0 << 1)
> +# define DP_FEC_UNCORR_BLK_ERROR_COUNT (1 << 1)
> +# define DP_FEC_CORR_BLK_ERROR_COUNT (2 << 1)
> +# define DP_FEC_BIT_ERROR_COUNT (3 << 1)
> +# define DP_FEC_ERR_COUNT_SEL_MASK (0xff << 4)
# define DP_FEC_ERROR_COUNT_SEL_MASK (7 << 1)
Put that above the values for error count sel.
And then
#define DP_FEC_LANE_SELECT_MASK (3 << 4)
> +# define DP_FEC_LANE_0_SELECT (0 << 4)
> +# define DP_FEC_LANE_1_SELECT (1 << 4)
> +# define DP_FEC_LANE_2_SELECT (2 << 4)
> +# define DP_FEC_LANE_3_SELECT (3 << 4)
> +
> #define DP_AUX_FRAME_SYNC_VALUE 0x15c /* eDP 1.4 */
> # define DP_AUX_FRAME_SYNC_VALID (1 << 0)
>
> @@ -620,6 +639,17 @@
> #define DP_TEST_SINK 0x270
> # define DP_TEST_SINK_START (1 << 0)
>
> +#define DP_FEC_STATUS 0x280
> +# define DP_FEC_DECODE_EN_DETECTED (1 << 0)
> +# define DP_FEC_DECODE_DIS_DETECTED (1 << 1)
> +
> +#define DP_FEC_ERROR_COUNT_LSB 0x0281
> +
> +#define DP_FEC_ERROR_COUNT_MSB 0x0282
> +# define DP_FEC_ERROR_COUNT_MASK 0x7F
> +# define DP_FEC_ERR_COUNT_SHIFT 8
Unnecessary.
> +# define DP_FEC_ERR_COUNT_VALID (1 << 7)
> +
> #define DP_PAYLOAD_TABLE_UPDATE_STATUS 0x2c0 /* 1.2 MST */
> # define DP_PAYLOAD_TABLE_UPDATED (1 << 0)
> # define DP_PAYLOAD_ACT_HANDLED (1 << 1)
--
Jani Nikula, Intel Open Source Technology Center
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^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature
2018-02-14 7:59 Anusha Srivatsa
2018-02-14 11:59 ` Jani Nikula
@ 2018-02-14 19:28 ` Anusha Srivatsa
2018-02-15 13:53 ` Jani Nikula
1 sibling, 1 reply; 9+ messages in thread
From: Anusha Srivatsa @ 2018-02-14 19:28 UTC (permalink / raw)
To: intel-gfx; +Cc: Manasi Navare, Anusha Srivatsa, dri-devel
Forward Error Correction is supported on DP 1.4.
This patch adds corresponding DPCD register definitions.
v2: Add dri-devel mailing list to the CC list(Jani)
v3: Change names, add missing masks (Manasi)
v4: Add missing shifts to mask (Manasi)
v5: Arrange the definitions in ascending order
of the address (Jani)
v6: remove unnecessary definitions. Add missing masks,
add "/* 1.4 */" to offset definitions. (Jani)
Cc: dri-devel@lists.freedesktop.org
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
include/drm/drm_dp_helper.h | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index c239e6e..4de97e9 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -329,6 +329,13 @@
# define DP_DS_12BPC 2
# define DP_DS_16BPC 3
+/* DP Forward error Correction Registers */
+#define DP_FEC_CAPABILITY 0x090 /* 1.4 */
+# define DP_FEC_CAPABLE (1 << 0)
+# define DP_FEC_UNCORR_BLK_ERROR_COUNT_CAP (1 << 1)
+# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP (1 << 2)
+# define DP_FEC_BIT_ERROR_COUNT_CAP (1 << 3)
+
/* link configuration */
#define DP_LINK_BW_SET 0x100
# define DP_LINK_RATE_TABLE 0x00 /* eDP 1.4 */
@@ -445,6 +452,19 @@
#define DP_UPSTREAM_DEVICE_DP_PWR_NEED 0x118 /* 1.2 */
# define DP_PWR_NOT_NEEDED (1 << 0)
+#define DP_FEC_CONFIGURATION 0x120 /* 1.4 */
+# define DP_FEC_READY (1 << 0)
+# define DP_FEC_ERR_COUNT_SEL_MASK (7 << 1)
+# define DP_FEC_ERR_COUNT_DIS (0 << 1)
+# define DP_FEC_UNCORR_BLK_ERROR_COUNT (1 << 1)
+# define DP_FEC_CORR_BLK_ERROR_COUNT (2 << 1)
+# define DP_FEC_BIT_ERROR_COUNT (3 << 1)
+# define DP_FEC_LANE_SELECT_MASK (3 << 4)
+# define DP_FEC_LANE_0_SELECT (0 << 4)
+# define DP_FEC_LANE_1_SELECT (1 << 4)
+# define DP_FEC_LANE_2_SELECT (2 << 4)
+# define DP_FEC_LANE_3_SELECT (3 << 4)
+
#define DP_AUX_FRAME_SYNC_VALUE 0x15c /* eDP 1.4 */
# define DP_AUX_FRAME_SYNC_VALID (1 << 0)
@@ -620,6 +640,16 @@
#define DP_TEST_SINK 0x270
# define DP_TEST_SINK_START (1 << 0)
+#define DP_FEC_STATUS 0x280 /* 1.4 */
+# define DP_FEC_DECODE_EN_DETECTED (1 << 0)
+# define DP_FEC_DECODE_DIS_DETECTED (1 << 1)
+
+#define DP_FEC_ERROR_COUNT_LSB 0x0281 /* 1.4 */
+
+#define DP_FEC_ERROR_COUNT_MSB 0x0282 /* 1.4 */
+# define DP_FEC_ERROR_COUNT_MASK 0x7F
+# define DP_FEC_ERR_COUNT_VALID (1 << 7)
+
#define DP_PAYLOAD_TABLE_UPDATE_STATUS 0x2c0 /* 1.2 MST */
# define DP_PAYLOAD_TABLE_UPDATED (1 << 0)
# define DP_PAYLOAD_ACT_HANDLED (1 << 1)
--
2.7.4
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature
2018-02-14 19:28 ` Anusha Srivatsa
@ 2018-02-15 13:53 ` Jani Nikula
0 siblings, 0 replies; 9+ messages in thread
From: Jani Nikula @ 2018-02-15 13:53 UTC (permalink / raw)
To: intel-gfx; +Cc: Manasi Navare, Anusha Srivatsa, dri-devel
On Wed, 14 Feb 2018, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> Forward Error Correction is supported on DP 1.4.
> This patch adds corresponding DPCD register definitions.
>
> v2: Add dri-devel mailing list to the CC list(Jani)
>
> v3: Change names, add missing masks (Manasi)
>
> v4: Add missing shifts to mask (Manasi)
>
> v5: Arrange the definitions in ascending order
> of the address (Jani)
>
> v6: remove unnecessary definitions. Add missing masks,
> add "/* 1.4 */" to offset definitions. (Jani)
>
> Cc: dri-devel@lists.freedesktop.org
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Pushed to drm-misc-next, thanks for the patch.
BR,
Jani.
> ---
> include/drm/drm_dp_helper.h | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index c239e6e..4de97e9 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -329,6 +329,13 @@
> # define DP_DS_12BPC 2
> # define DP_DS_16BPC 3
>
> +/* DP Forward error Correction Registers */
> +#define DP_FEC_CAPABILITY 0x090 /* 1.4 */
> +# define DP_FEC_CAPABLE (1 << 0)
> +# define DP_FEC_UNCORR_BLK_ERROR_COUNT_CAP (1 << 1)
> +# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP (1 << 2)
> +# define DP_FEC_BIT_ERROR_COUNT_CAP (1 << 3)
> +
> /* link configuration */
> #define DP_LINK_BW_SET 0x100
> # define DP_LINK_RATE_TABLE 0x00 /* eDP 1.4 */
> @@ -445,6 +452,19 @@
> #define DP_UPSTREAM_DEVICE_DP_PWR_NEED 0x118 /* 1.2 */
> # define DP_PWR_NOT_NEEDED (1 << 0)
>
> +#define DP_FEC_CONFIGURATION 0x120 /* 1.4 */
> +# define DP_FEC_READY (1 << 0)
> +# define DP_FEC_ERR_COUNT_SEL_MASK (7 << 1)
> +# define DP_FEC_ERR_COUNT_DIS (0 << 1)
> +# define DP_FEC_UNCORR_BLK_ERROR_COUNT (1 << 1)
> +# define DP_FEC_CORR_BLK_ERROR_COUNT (2 << 1)
> +# define DP_FEC_BIT_ERROR_COUNT (3 << 1)
> +# define DP_FEC_LANE_SELECT_MASK (3 << 4)
> +# define DP_FEC_LANE_0_SELECT (0 << 4)
> +# define DP_FEC_LANE_1_SELECT (1 << 4)
> +# define DP_FEC_LANE_2_SELECT (2 << 4)
> +# define DP_FEC_LANE_3_SELECT (3 << 4)
> +
> #define DP_AUX_FRAME_SYNC_VALUE 0x15c /* eDP 1.4 */
> # define DP_AUX_FRAME_SYNC_VALID (1 << 0)
>
> @@ -620,6 +640,16 @@
> #define DP_TEST_SINK 0x270
> # define DP_TEST_SINK_START (1 << 0)
>
> +#define DP_FEC_STATUS 0x280 /* 1.4 */
> +# define DP_FEC_DECODE_EN_DETECTED (1 << 0)
> +# define DP_FEC_DECODE_DIS_DETECTED (1 << 1)
> +
> +#define DP_FEC_ERROR_COUNT_LSB 0x0281 /* 1.4 */
> +
> +#define DP_FEC_ERROR_COUNT_MSB 0x0282 /* 1.4 */
> +# define DP_FEC_ERROR_COUNT_MASK 0x7F
> +# define DP_FEC_ERR_COUNT_VALID (1 << 7)
> +
> #define DP_PAYLOAD_TABLE_UPDATE_STATUS 0x2c0 /* 1.2 MST */
> # define DP_PAYLOAD_TABLE_UPDATED (1 << 0)
> # define DP_PAYLOAD_ACT_HANDLED (1 << 1)
--
Jani Nikula, Intel Open Source Technology Center
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^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature
@ 2017-11-28 0:55 Anusha Srivatsa
2017-12-21 20:36 ` Manasi Navare
0 siblings, 1 reply; 9+ messages in thread
From: Anusha Srivatsa @ 2017-11-28 0:55 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
Forward Error Correction is supported on DP 1.4.
This patch adds corresponding DPCD register definitions.
v2: Add dri-devel to the CC list
Cc: dri-devel@lists.freedesktop.org
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
include/drm/drm_dp_helper.h | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index da58a42..bc816ea 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -284,6 +284,35 @@
# define DP_DSC_BITS_PER_PIXEL_1_2 0x3
# define DP_DSC_BITS_PER_PIXEL_1 0x4
+/* DP Forward error Correction Registers */
+#define DP_FEC_CAPABILITY 0x090
+# define DP_FEC_CAPABLE (1 << 0)
+# define DP_FEC_UNCORR_BLK_ERROR_COUNT_CAP (1 << 1)
+# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP (1 << 2)
+# define DP_FEC_BIT_ERROR_COUNT_CAP (1 << 3)
+
+#define DP_FEC_CONFIGURATION 0x120
+# define DP_FEC_READY (1 << 0)
+# define DP_FEC_ERR_COUNT_DIS (0 << 1)
+# define DP_FEC_UNCORR_BLK_ERROR_COUNT (1 << 1)
+# define DP_FEC_CORR_BLK_ERROR_COUNT (2 << 1)
+# define DP_FEC_BIT_ERROR_COUNT (3 << 1)
+# define DP_FEC_LANE_0_SELECT (0 << 4)
+# define DP_FEC_LANE_1_SELECT (1 << 4)
+# define DP_FEC_LANE_2_SELECT (2 << 4)
+# define DP_FEC_LANE_3_SELECT (3 << 4)
+
+#define DP_FEC_STATUS 0x280
+# define DP_FEC_EN_DETECTED (1 << 0)
+# define DP_FEC_DEC_DETECTED (1 << 1)
+
+#define DP_FEC_ERROR_COUNT_1 0x0281
+# define DP_FEC_ERR_COUNT_7_0(err_count) (err_count << 0)
+
+#define DP_FEC_ERROR_COUNT_2 0x0282
+# define DP_FEC_ERR_COUNT_14_8(err_count) (err_count << 0)
+# define DP_FEC_ERR_COUNT_VALID (1 << 7)
+
#define DP_PSR_SUPPORT 0x070 /* XXX 1.2? */
# define DP_PSR_IS_SUPPORTED 1
# define DP_PSR2_IS_SUPPORTED 2 /* eDP 1.4 */
--
2.7.4
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature
2017-11-28 0:55 Anusha Srivatsa
@ 2017-12-21 20:36 ` Manasi Navare
2017-12-21 20:51 ` Srivatsa, Anusha
0 siblings, 1 reply; 9+ messages in thread
From: Manasi Navare @ 2017-12-21 20:36 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx, dri-devel
On Mon, Nov 27, 2017 at 04:55:44PM -0800, Anusha Srivatsa wrote:
> Forward Error Correction is supported on DP 1.4.
> This patch adds corresponding DPCD register definitions.
>
> v2: Add dri-devel to the CC list
>
> Cc: dri-devel@lists.freedesktop.org
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> include/drm/drm_dp_helper.h | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index da58a42..bc816ea 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -284,6 +284,35 @@
> # define DP_DSC_BITS_PER_PIXEL_1_2 0x3
> # define DP_DSC_BITS_PER_PIXEL_1 0x4
>
> +/* DP Forward error Correction Registers */
> +#define DP_FEC_CAPABILITY 0x090
> +# define DP_FEC_CAPABLE (1 << 0)
> +# define DP_FEC_UNCORR_BLK_ERROR_COUNT_CAP (1 << 1)
> +# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP (1 << 2)
> +# define DP_FEC_BIT_ERROR_COUNT_CAP (1 << 3)
> +
> +#define DP_FEC_CONFIGURATION 0x120
> +# define DP_FEC_READY (1 << 0)
> +# define DP_FEC_ERR_COUNT_DIS (0 << 1)
> +# define DP_FEC_UNCORR_BLK_ERROR_COUNT (1 << 1)
> +# define DP_FEC_CORR_BLK_ERROR_COUNT (2 << 1)
> +# define DP_FEC_BIT_ERROR_COUNT (3 << 1)
These above values indicate the value of FEC_ERROR_COUNT_SEL.
I think we would need a mask for FEC_ERROR_COUNT_SEL field so that
we can read this field as drm_dpcd_read(DP_FEC_CONFIGURATION) & FEC_ERROR_COUNT_SEL_MASK
and then compare this to each of the values for that field.
So we would need an extra #define for the MASK
> +# define DP_FEC_LANE_0_SELECT (0 << 4)
> +# define DP_FEC_LANE_1_SELECT (1 << 4)
> +# define DP_FEC_LANE_2_SELECT (2 << 4)
> +# define DP_FEC_LANE_3_SELECT (3 << 4)
> +
> +#define DP_FEC_STATUS 0x280
> +# define DP_FEC_EN_DETECTED (1 << 0)
I think better name would be DP_FEC_DECODE_EN_DETECTED since this refers
to FEC_DECODE_EN link symbol sequence
> +# define DP_FEC_DEC_DETECTED (1 << 1)
And this should be DP_FEC_DECODE_DIS_DETECTED since this refers to
FEC_DECODE_DIS link symbol sequence
> +
> +#define DP_FEC_ERROR_COUNT_1 0x0281
> +# define DP_FEC_ERR_COUNT_7_0(err_count) (err_count << 0)
So this is a RO register and so we wont be writing the err_count by passing it as
an argument as above.
And this is the entire reister that indicates the LSB of ERR_COUNT you can just rename the
register as DP_FEC_ERR_COUNT_LSB
So while reading you just pass this register address and get LSB into a variable.
> +
> +#define DP_FEC_ERROR_COUNT_2 0x0282
> +# define DP_FEC_ERR_COUNT_14_8(err_count) (err_count << 0)
This could be DP_FEC_ERR_COUNT_MSB_MASK and SHIFT should be 8 since
you want to put this value at the 8th bit of a 16 bit value.
> +# define DP_FEC_ERR_COUNT_VALID (1 << 7)
Everything else looks good.
Manasi
> +
> #define DP_PSR_SUPPORT 0x070 /* XXX 1.2? */
> # define DP_PSR_IS_SUPPORTED 1
> # define DP_PSR2_IS_SUPPORTED 2 /* eDP 1.4 */
> --
> 2.7.4
>
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^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature
2017-12-21 20:36 ` Manasi Navare
@ 2017-12-21 20:51 ` Srivatsa, Anusha
0 siblings, 0 replies; 9+ messages in thread
From: Srivatsa, Anusha @ 2017-12-21 20:51 UTC (permalink / raw)
To: Navare, Manasi D
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
>-----Original Message-----
>From: Navare, Manasi D
>Sent: Thursday, December 21, 2017 12:36 PM
>To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
>Cc: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Ville Syrjala
><ville.syrjala@linux.intel.com>; Jani Nikula <jani.nikula@linux.intel.com>
>Subject: Re: [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature
>
>On Mon, Nov 27, 2017 at 04:55:44PM -0800, Anusha Srivatsa wrote:
>> Forward Error Correction is supported on DP 1.4.
>> This patch adds corresponding DPCD register definitions.
>>
>> v2: Add dri-devel to the CC list
>>
>> Cc: dri-devel@lists.freedesktop.org
>> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
>> Cc: Jani Nikula <jani.nikula@linux.intel.com>
>> Cc: Manasi Navare <manasi.d.navare@intel.com>
>> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> ---
>> include/drm/drm_dp_helper.h | 29 +++++++++++++++++++++++++++++
>> 1 file changed, 29 insertions(+)
>>
>> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
>> index da58a42..bc816ea 100644
>> --- a/include/drm/drm_dp_helper.h
>> +++ b/include/drm/drm_dp_helper.h
>> @@ -284,6 +284,35 @@
>> # define DP_DSC_BITS_PER_PIXEL_1_2 0x3
>> # define DP_DSC_BITS_PER_PIXEL_1 0x4
>>
>> +/* DP Forward error Correction Registers */
>> +#define DP_FEC_CAPABILITY 0x090
>> +# define DP_FEC_CAPABLE (1 << 0)
>> +# define DP_FEC_UNCORR_BLK_ERROR_COUNT_CAP (1 << 1)
>> +# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP (1 << 2)
>> +# define DP_FEC_BIT_ERROR_COUNT_CAP (1 << 3)
>> +
>> +#define DP_FEC_CONFIGURATION 0x120
>> +# define DP_FEC_READY (1 << 0)
>> +# define DP_FEC_ERR_COUNT_DIS (0 << 1)
>> +# define DP_FEC_UNCORR_BLK_ERROR_COUNT (1 << 1)
>> +# define DP_FEC_CORR_BLK_ERROR_COUNT (2 << 1)
>> +# define DP_FEC_BIT_ERROR_COUNT (3 << 1)
>
>These above values indicate the value of FEC_ERROR_COUNT_SEL.
>I think we would need a mask for FEC_ERROR_COUNT_SEL field so that we can
>read this field as drm_dpcd_read(DP_FEC_CONFIGURATION) &
>FEC_ERROR_COUNT_SEL_MASK and then compare this to each of the values for
>that field.
>So we would need an extra #define for the MASK
Sounds good....
>> +# define DP_FEC_LANE_0_SELECT (0 << 4)
>> +# define DP_FEC_LANE_1_SELECT (1 << 4)
>> +# define DP_FEC_LANE_2_SELECT (2 << 4)
>> +# define DP_FEC_LANE_3_SELECT (3 << 4)
>> +
>> +#define DP_FEC_STATUS 0x280
>> +# define DP_FEC_EN_DETECTED (1 << 0)
>
>I think better name would be DP_FEC_DECODE_EN_DETECTED since this refers to
>FEC_DECODE_EN link symbol sequence
Now that you mentioned, I noticed that's the name used in spec too. I wonder why I went ahead with the above name. Shall change it. Thanks.
>> +# define DP_FEC_DEC_DETECTED (1 << 1)
>
>And this should be DP_FEC_DECODE_DIS_DETECTED since this refers to
>FEC_DECODE_DIS link symbol sequence
>
>> +
>> +#define DP_FEC_ERROR_COUNT_1 0x0281
>> +# define DP_FEC_ERR_COUNT_7_0(err_count) (err_count << 0)
>
>So this is a RO register and so we wont be writing the err_count by passing it as
>an argument as above.
>And this is the entire reister that indicates the LSB of ERR_COUNT you can just
>rename the register as DP_FEC_ERR_COUNT_LSB So while reading you just pass
>this register address and get LSB into a variable.
Yes, good point.
>
>> +
>> +#define DP_FEC_ERROR_COUNT_2 0x0282
>> +# define DP_FEC_ERR_COUNT_14_8(err_count) (err_count << 0)
>
>This could be DP_FEC_ERR_COUNT_MSB_MASK and SHIFT should be 8 since you
>want to put this value at the 8th bit of a 16 bit value.
This helps.... thanks!
>> +# define DP_FEC_ERR_COUNT_VALID (1 << 7)
>
>Everything else looks good.
Thanks Manasi. I will incorporate these changes in the next revision.
Anusha
>Manasi
>
>> +
>> #define DP_PSR_SUPPORT 0x070 /* XXX 1.2? */
>> # define DP_PSR_IS_SUPPORTED 1
>> # define DP_PSR2_IS_SUPPORTED 2 /* eDP 1.4 */
>> --
>> 2.7.4
>>
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^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2018-02-15 13:53 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
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2017-12-22 22:02 [PATCH] drm: Add DPCD definitions for DP 1.4 FEC feature Anusha Srivatsa
2017-12-22 23:39 ` Manasi Navare
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2018-02-14 7:59 Anusha Srivatsa
2018-02-14 11:59 ` Jani Nikula
2018-02-14 19:28 ` Anusha Srivatsa
2018-02-15 13:53 ` Jani Nikula
2017-11-28 0:55 Anusha Srivatsa
2017-12-21 20:36 ` Manasi Navare
2017-12-21 20:51 ` Srivatsa, Anusha
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