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From: Tanmay Shah <tanmay@codeaurora.org>
To: dri-devel@lists.freedesktop.org
Cc: Tanmay Shah <tanmay@codeaurora.org>,
	ryadav@codeaurora.org, chandanu@codeaurora.org,
	manojavm@codeaurora.org
Subject: [PATCH libdrm v1 2/2] drm/fourcc: add msm compressed format modifiers
Date: Fri, 29 Jun 2018 13:16:21 -0700	[thread overview]
Message-ID: <1530303381-1138-2-git-send-email-tanmay@codeaurora.org> (raw)
In-Reply-To: <1530303381-1138-1-git-send-email-tanmay@codeaurora.org>

Qualcomm Snapdragon chipsets uses compressed format
to optimize BW across multiple IP's. This change adds
needed modifier support in drm for a simple 4x4 tile
based compressed variants of base formats.

derived from kernel patch: https://patchwork.kernel.org/patch/10449533/

Signed-off-by: Tanmay Shah <tanmay@codeaurora.org>
---
 include/drm/drm_fourcc.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h
index e04613d..85c6fe1 100644
--- a/include/drm/drm_fourcc.h
+++ b/include/drm/drm_fourcc.h
@@ -298,6 +298,19 @@ extern "C" {
  */
 #define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE	fourcc_mod_code(SAMSUNG, 1)
 
+/*
+ * MSM compressed format
+ *
+ * Refers to the compressed variant of a base format.
+ * Implementation may be platform and base-format specific.
+ *
+ * Each macrotile consists of m x n (mostly 4 x 4) tiles.
+ * Pixel data pitch/stride is aligned with macrotile width.
+ * Pixel data height is aligned with macrotile height.
+ * Entire pixel data buffer is aligned with 4k(bytes).
+ */
+#define DRM_FORMAT_MOD_QCOM_COMPRESSED	fourcc_mod_code(QCOM, 1)
+
 /* Vivante framebuffer modifiers */
 
 /*
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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      reply	other threads:[~2018-06-29 20:16 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-29 20:16 [PATCH libdrm v1 1/2] libdrm: add msm drm uapi header Tanmay Shah
2018-06-29 20:16 ` Tanmay Shah [this message]

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