From mboxrd@z Thu Jan 1 00:00:00 1970 From: Uma Shankar Subject: [v3 3/7] drm/i915/icl: Add register definitions for Multi Segmented gamma Date: Fri, 12 Apr 2019 15:50:59 +0530 Message-ID: <1555064463-18479-4-git-send-email-uma.shankar@intel.com> References: <1555064463-18479-1-git-send-email-uma.shankar@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1555064463-18479-1-git-send-email-uma.shankar@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: dcastagna@chromium.org, sam@ravnborg.org, seanpaul@chromium.org, ville.syrjala@intel.com, maarten.lankhorst@intel.com List-Id: dri-devel@lists.freedesktop.org QWRkIG1hY3JvcyB0byBkZWZpbmUgbXVsdGkgc2VnbWVudGVkIGdhbW1hIHJlZ2lzdGVycwoKU2ln bmVkLW9mZi1ieTogVW1hIFNoYW5rYXIgPHVtYS5zaGFua2FyQGludGVsLmNvbT4KLS0tCiBkcml2 ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oIHwgMTcgKysrKysrKysrKysrKysrKysKIDEgZmls ZSBjaGFuZ2VkLCAxNyBpbnNlcnRpb25zKCspCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJt L2k5MTUvaTkxNV9yZWcuaCBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVnLmgKaW5kZXgg OWMyMDZlOC4uNTU1NGIwYyAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9y ZWcuaAorKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oCkBAIC03MTk2LDYgKzcx OTYsNyBAQCBlbnVtIHsKICNkZWZpbmUgIEdBTU1BX01PREVfTU9ERV8xMEJJVAkoMSA8PCAwKQog I2RlZmluZSAgR0FNTUFfTU9ERV9NT0RFXzEyQklUCSgyIDw8IDApCiAjZGVmaW5lICBHQU1NQV9N T0RFX01PREVfU1BMSVQJKDMgPDwgMCkKKyNkZWZpbmUgIEdBTU1BX01PREVfTU9ERV8xMkJJVF9N VUxUSV9TRUdNRU5URUQJKDMgPDwgMCkKIAogLyogRE1DL0NTUiAqLwogI2RlZmluZSBDU1JfUFJP R1JBTShpKQkJX01NSU8oMHg4MDAwMCArIChpKSAqIDQpCkBAIC0xMDEzNiw2ICsxMDEzNywyMiBA QCBlbnVtIHNrbF9wb3dlcl9nYXRlIHsKICNkZWZpbmUgUFJFX0NTQ19HQU1DX0lOREVYKHBpcGUp CV9NTUlPX1BJUEUocGlwZSwgX1BSRV9DU0NfR0FNQ19JTkRFWF9BLCBfUFJFX0NTQ19HQU1DX0lO REVYX0IpCiAjZGVmaW5lIFBSRV9DU0NfR0FNQ19EQVRBKHBpcGUpCQlfTU1JT19QSVBFKHBpcGUs IF9QUkVfQ1NDX0dBTUNfREFUQV9BLCBfUFJFX0NTQ19HQU1DX0RBVEFfQikKIAorLyogQWRkIHJl Z2lzdGVycyBmb3IgR2VuMTEgTXVsdGkgU2VnbWVudGVkIEdhbW1hIE1vZGUgKi8KKyNkZWZpbmUg X1BBTF9QUkVDX01VTFRJX1NFR19JTkRFWF9BCTB4NEE0MDgKKyNkZWZpbmUgX1BBTF9QUkVDX01V TFRJX1NFR19JTkRFWF9CCTB4NEFDMDgKKyNkZWZpbmUgIFBBTF9QUkVDX01VTFRJX1NFR01FTlRf QVVUT19JTkNSRU1FTlQJCUJJVCgxNSkKKyNkZWZpbmUgIFBBTF9QUkVDX01VTFRJX1NFR01FTlRf SU5ERVhfVkFMVUVfTUFTSwkoMHgxZiA8PCAwKQorCisjZGVmaW5lIF9QQUxfUFJFQ19NVUxUSV9T RUdfREFUQV9BCTB4NEE0MEMKKyNkZWZpbmUgX1BBTF9QUkVDX01VTFRJX1NFR19EQVRBX0IJMHg0 QUMwQworCisjZGVmaW5lIFBSRUNfUEFMX01VTFRJX1NFR19JTkRFWChwaXBlKQlfTU1JT19QSVBF KHBpcGUsIFwKKwkJCQkJX1BBTF9QUkVDX01VTFRJX1NFR19JTkRFWF9BLCBcCisJCQkJCV9QQUxf UFJFQ19NVUxUSV9TRUdfSU5ERVhfQikKKyNkZWZpbmUgUFJFQ19QQUxfTVVMVElfU0VHX0RBVEEo cGlwZSkJX01NSU9fUElQRShwaXBlLCBcCisJCQkJCV9QQUxfUFJFQ19NVUxUSV9TRUdfREFUQV9B LCBcCisJCQkJCV9QQUxfUFJFQ19NVUxUSV9TRUdfREFUQV9CKQorCiAvKiBwaXBlIENTQyAmIGRl Z2FtbWEvZ2FtbWEgTFVUcyBvbiBDSFYgKi8KICNkZWZpbmUgX0NHTV9QSVBFX0FfQ1NDX0NPRUZG MDEJKFZMVl9ESVNQTEFZX0JBU0UgKyAweDY3OTAwKQogI2RlZmluZSBfQ0dNX1BJUEVfQV9DU0Nf Q09FRkYyMwkoVkxWX0RJU1BMQVlfQkFTRSArIDB4Njc5MDQpCi0tIAoxLjkuMQoKX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcg bGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRl c2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4