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From: "Huang, Ray" <Ray.Huang-5C7GfCeVMHo@public.gmane.org>
To: "amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
	<amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>,
	"dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
	<dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>,
	"Deucher,
	Alexander" <Alexander.Deucher-5C7GfCeVMHo@public.gmane.org>
Cc: "Tuikov, Luben" <Luben.Tuikov-5C7GfCeVMHo@public.gmane.org>,
	"Huang, Ray" <Ray.Huang-5C7GfCeVMHo@public.gmane.org>,
	"Koenig,
	Christian" <Christian.Koenig-5C7GfCeVMHo@public.gmane.org>,
	"Liu, Aaron" <Aaron.Liu-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH v2 05/11] drm/amdgpu: add amdgpu_tmz data structure
Date: Wed, 25 Sep 2019 13:45:24 +0000	[thread overview]
Message-ID: <1569419090-5304-6-git-send-email-ray.huang@amd.com> (raw)
In-Reply-To: <1569419090-5304-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>

This patch to add amdgpu_tmz structure which stores all tmz related fields.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  6 +++++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_tmz.h | 36 +++++++++++++++++++++++++++++++++
 2 files changed, 41 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_tmz.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 930643c..697e8e5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -89,6 +89,7 @@
 #include "amdgpu_mes.h"
 #include "amdgpu_umc.h"
 #include "amdgpu_mmhub.h"
+#include "amdgpu_tmz.h"
 
 #define MAX_GPU_INSTANCE		16
 
@@ -916,6 +917,9 @@ struct amdgpu_device {
 	bool                            enable_mes;
 	struct amdgpu_mes               mes;
 
+	/* tmz */
+	struct amdgpu_tmz		tmz;
+
 	struct amdgpu_ip_block          ip_blocks[AMDGPU_MAX_IP_NUM];
 	int				num_ip_blocks;
 	struct mutex	mn_lock;
@@ -927,7 +931,7 @@ struct amdgpu_device {
 	atomic64_t gart_pin_size;
 
 	/* soc15 register offset based on ip, instance and  segment */
-	uint32_t 		*reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE];
+	uint32_t		*reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE];
 
 	const struct amdgpu_df_funcs	*df_funcs;
 	const struct amdgpu_mmhub_funcs	*mmhub_funcs;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_tmz.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_tmz.h
new file mode 100644
index 0000000..24bbbc2
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_tmz.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright 2019 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __AMDGPU_TMZ_H__
+#define __AMDGPU_TMZ_H__
+
+#include "amdgpu.h"
+
+/*
+ * Trust memory zone stuff
+ */
+struct amdgpu_tmz {
+	bool	enabled;
+};
+
+#endif
-- 
2.7.4

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  parent reply	other threads:[~2019-09-25 13:45 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-25 13:45 [PATCH v2 00/11] drm/amdgpu: introduce secure buffer object support (trusted memory zone) Huang, Ray
     [not found] ` <1569419090-5304-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2019-09-25 13:45   ` [PATCH v2 01/11] drm/amdgpu: add UAPI for creating encrypted buffers Huang, Ray
2019-09-25 13:45   ` [PATCH v2 03/11] drm/amdgpu: define the TMZ bit for the PTE Huang, Ray
2019-09-25 13:45   ` [PATCH v2 04/11] drm/amdgpu: add tmz feature parameter (v2) Huang, Ray
2019-09-25 13:45   ` Huang, Ray [this message]
2019-09-25 13:45   ` [PATCH v2 06/11] drm/amdgpu: add function to check tmz capability (v4) Huang, Ray
2019-09-25 13:45   ` [PATCH v2 07/11] drm/amdgpu: add tmz bit in frame control packet Huang, Ray
2019-09-25 13:45   ` [PATCH v2 09/11] drm/amdgpu: expand the context control interface with trust flag Huang, Ray
2019-09-25 13:45   ` [PATCH v2 10/11] drm/amdgpu: job is secure iff CS is secure (v3) Huang, Ray
     [not found]     ` <1569419090-5304-11-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2019-09-25 13:56       ` Koenig, Christian
2019-09-25 13:45 ` [PATCH v2 02/11] drm/amdgpu: add UAPI to create secure commands (v3) Huang, Ray
2019-09-25 13:45 ` [PATCH v2 08/11] drm/amdgpu: expand the emit tmz interface with trusted flag Huang, Ray
2019-09-25 13:45 ` [PATCH v2 11/11] drm/amdgpu: set TMZ bits in PTEs for secure BO (v4) Huang, Ray
     [not found]   ` <1569419090-5304-12-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2019-09-25 13:59     ` Koenig, Christian
     [not found]       ` <507b6359-897a-20a1-2fff-28634858f464-5C7GfCeVMHo@public.gmane.org>
2019-09-25 16:01         ` Alex Deucher
2019-09-26  7:21           ` Christian König

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