From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.1 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 899A2C2BA83 for ; Wed, 12 Feb 2020 10:48:41 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5C1122082F for ; Wed, 12 Feb 2020 10:48:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="IkkwUNsZ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5C1122082F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D16FC6F4BD; Wed, 12 Feb 2020 10:48:40 +0000 (UTC) Received: from mailgw01.mediatek.com (unknown [210.61.82.183]) by gabe.freedesktop.org (Postfix) with ESMTP id 3FCE36F4BD for ; Wed, 12 Feb 2020 10:48:39 +0000 (UTC) X-UUID: 0c7c1e2b068f4f719bae6fd77af1253c-20200212 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=ssEEVXg39Akuq7xiDnhxIk0C5G9biOCSA4wS5rOD9IE=; b=IkkwUNsZqgNJJv+KYTxW1JovHrISvU4OJAeGFWmGM58HAMYyIbkhjtD91riwoYR6RfdpiT6MACDADHZNugqbzfEVpYUIOhg1FKCJMADiGJVXK7K2KT6FGaGqqJofRVcYDvLkOFQiOdI1AjXo1afKS2xjK7lo2orLzUDyZUBqQfs=; X-UUID: 0c7c1e2b068f4f719bae6fd77af1253c-20200212 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 2035690431; Wed, 12 Feb 2020 18:48:35 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 12 Feb 2020 18:47:44 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 12 Feb 2020 18:47:34 +0800 Message-ID: <1581504514.26347.4.camel@mtksdaap41> Subject: Re: [PATCH 1/2] arm64: dts: mt8183: Add gce setting in display node From: CK Hu To: Bibby Hsieh Date: Wed, 12 Feb 2020 18:48:34 +0800 In-Reply-To: <20200212095501.12124-1-bibby.hsieh@mediatek.com> References: <20200212095501.12124-1-bibby.hsieh@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: drinkcat@chromium.org, Yongqiang Niu , srv_heupstream@mediatek.com, David Airlie , Daniel Vetter , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, tfiga@chromium.org, Thierry Reding , linux-mediatek@lists.infradead.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Wed, 2020-02-12 at 17:55 +0800, Bibby Hsieh wrote: > In order to use GCE function, we need add some information > into display node (mboxes, mediatek,gce-client-reg, mediatek,gce-events). > > Signed-off-by: Bibby Hsieh > Signed-off-by: Yongqiang Niu > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index be4428c92f35..1f0fc281bc2d 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -9,6 +9,7 @@ > #include > #include > #include > +#include > #include "mt8183-pinfunc.h" > > / { > @@ -664,6 +665,9 @@ > reg = <0 0x14000000 0 0x1000>; > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > #clock-cells = <1>; > + mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST 1>, I would like to remove atomic parameter, so please follow [1] to remove it. [1] https://patchwork.kernel.org/patch/10765419/ Regards, CK > + <&gce 1 CMDQ_THR_PRIO_HIGHEST 1>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; > }; > > ovl0: ovl@14008000 { > @@ -672,6 +676,7 @@ > interrupts = ; > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_OVL0>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x8000 0x1000>; > }; > > ovl_2l0: ovl@14009000 { > @@ -680,6 +685,7 @@ > interrupts = ; > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_OVL0_2L>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>; > }; > > ovl_2l1: ovl@1400a000 { > @@ -688,6 +694,7 @@ > interrupts = ; > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_OVL1_2L>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xa000 0x1000>; > }; > > rdma0: rdma@1400b000 { > @@ -697,6 +704,7 @@ > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_RDMA0>; > mediatek,rdma_fifo_size = <5120>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>; > }; > > rdma1: rdma@1400c000 { > @@ -706,6 +714,7 @@ > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_RDMA1>; > mediatek,rdma_fifo_size = <2048>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>; > }; > > color0: color@1400e000 { > @@ -715,6 +724,7 @@ > interrupts = ; > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_COLOR0>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>; > }; > > ccorr0: ccorr@1400f000 { > @@ -723,6 +733,7 @@ > interrupts = ; > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_CCORR0>; > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>; > }; > > aal0: aal@14010000 { > @@ -732,6 +743,7 @@ > interrupts = ; > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_AAL0>; > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0 0x1000>; > }; > > gamma0: gamma@14011000 { > @@ -741,6 +753,7 @@ > interrupts = ; > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_GAMMA0>; > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>; > }; > > dither0: dither@14012000 { > @@ -749,6 +762,7 @@ > interrupts = ; > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > clocks = <&mmsys CLK_MM_DISP_DITHER0>; > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>; > }; > > mutex: mutex@14016000 { > @@ -756,6 +770,8 @@ > reg = <0 0x14016000 0 0x1000>; > interrupts = ; > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > + mediatek,gce-events = , > + ; > }; > > smi_common: smi@14019000 { _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel