From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.1 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FB63C352A4 for ; Thu, 13 Feb 2020 01:27:02 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2CEFA24693 for ; Thu, 13 Feb 2020 01:27:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="rvxiq1ff" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2CEFA24693 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1D3606E142; Thu, 13 Feb 2020 01:27:01 +0000 (UTC) Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by gabe.freedesktop.org (Postfix) with ESMTP id 5A3FA6E142 for ; Thu, 13 Feb 2020 01:26:59 +0000 (UTC) X-UUID: cbc872e4b40242fc8d2d3d8b23d7993f-20200213 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=yOSBqxqyM2MBNdVtLEcUpyckrLNC7q1s0wr5YIz7XTw=; b=rvxiq1ffA/1uEyJ0mg3lMBWqFgHfnwv/KutQjyBKQ6Ko9WVMLOm2CKZaHGfUXI1U3qoHskVIpbzHR8l4l1ZlFufYbzVjNO6LxxAw5uUZh/p1QXjWlVdSbIbefthKeUPGQf1BVmuWkFUgYu31Q6aOzBbn3NpFB9Y46Y23yJrJuEo=; X-UUID: cbc872e4b40242fc8d2d3d8b23d7993f-20200213 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 497296874; Thu, 13 Feb 2020 09:26:56 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 13 Feb 2020 09:26:07 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 13 Feb 2020 09:27:23 +0800 Message-ID: <1581557213.12296.0.camel@mtksdaap41> Subject: Re: [PATCH 1/2] arm64: dts: mt8183: Add gce setting in display node From: Bibby Hsieh To: CK Hu Date: Thu, 13 Feb 2020 09:26:53 +0800 In-Reply-To: <1581504514.26347.4.camel@mtksdaap41> References: <20200212095501.12124-1-bibby.hsieh@mediatek.com> <1581504514.26347.4.camel@mtksdaap41> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: drinkcat@chromium.org, Yongqiang Niu , srv_heupstream@mediatek.com, David Airlie , Daniel Vetter , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, tfiga@chromium.org, Thierry Reding , linux-mediatek@lists.infradead.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Wed, 2020-02-12 at 18:48 +0800, CK Hu wrote: > On Wed, 2020-02-12 at 17:55 +0800, Bibby Hsieh wrote: > > In order to use GCE function, we need add some information > > into display node (mboxes, mediatek,gce-client-reg, mediatek,gce-events). > > > > Signed-off-by: Bibby Hsieh > > Signed-off-by: Yongqiang Niu > > --- > > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 16 ++++++++++++++++ > > 1 file changed, 16 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > index be4428c92f35..1f0fc281bc2d 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > @@ -9,6 +9,7 @@ > > #include > > #include > > #include > > +#include > > #include "mt8183-pinfunc.h" > > > > / { > > @@ -664,6 +665,9 @@ > > reg = <0 0x14000000 0 0x1000>; > > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > #clock-cells = <1>; > > + mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST 1>, > > I would like to remove atomic parameter, so please follow [1] to remove > it. > > [1] https://patchwork.kernel.org/patch/10765419/ Hi, CK, Yeah, I'm trying remove atomic feature. Thanks Bibby > > Regards, > CK > > > + <&gce 1 CMDQ_THR_PRIO_HIGHEST 1>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; > > }; > > > > ovl0: ovl@14008000 { > > @@ -672,6 +676,7 @@ > > interrupts = ; > > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > clocks = <&mmsys CLK_MM_DISP_OVL0>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x8000 0x1000>; > > }; > > > > ovl_2l0: ovl@14009000 { > > @@ -680,6 +685,7 @@ > > interrupts = ; > > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > clocks = <&mmsys CLK_MM_DISP_OVL0_2L>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>; > > }; > > > > ovl_2l1: ovl@1400a000 { > > @@ -688,6 +694,7 @@ > > interrupts = ; > > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > clocks = <&mmsys CLK_MM_DISP_OVL1_2L>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xa000 0x1000>; > > }; > > > > rdma0: rdma@1400b000 { > > @@ -697,6 +704,7 @@ > > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > clocks = <&mmsys CLK_MM_DISP_RDMA0>; > > mediatek,rdma_fifo_size = <5120>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>; > > }; > > > > rdma1: rdma@1400c000 { > > @@ -706,6 +714,7 @@ > > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > clocks = <&mmsys CLK_MM_DISP_RDMA1>; > > mediatek,rdma_fifo_size = <2048>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>; > > }; > > > > color0: color@1400e000 { > > @@ -715,6 +724,7 @@ > > interrupts = ; > > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > clocks = <&mmsys CLK_MM_DISP_COLOR0>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>; > > }; > > > > ccorr0: ccorr@1400f000 { > > @@ -723,6 +733,7 @@ > > interrupts = ; > > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > clocks = <&mmsys CLK_MM_DISP_CCORR0>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>; > > }; > > > > aal0: aal@14010000 { > > @@ -732,6 +743,7 @@ > > interrupts = ; > > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > clocks = <&mmsys CLK_MM_DISP_AAL0>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0 0x1000>; > > }; > > > > gamma0: gamma@14011000 { > > @@ -741,6 +753,7 @@ > > interrupts = ; > > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > clocks = <&mmsys CLK_MM_DISP_GAMMA0>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>; > > }; > > > > dither0: dither@14012000 { > > @@ -749,6 +762,7 @@ > > interrupts = ; > > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > clocks = <&mmsys CLK_MM_DISP_DITHER0>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>; > > }; > > > > mutex: mutex@14016000 { > > @@ -756,6 +770,8 @@ > > reg = <0 0x14016000 0 0x1000>; > > interrupts = ; > > power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>; > > + mediatek,gce-events = , > > + ; > > }; > > > > smi_common: smi@14019000 { > > _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel