From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Agner Subject: Re: [PATCH v2 04/15] drm/mxsfb: Reset vital register for a proper initialization Date: Wed, 14 Aug 2019 13:11:03 +0200 Message-ID: <18d5f58deba8044042ab7b8d98a72803@agner.ch> References: <1565779731-1300-1-git-send-email-robert.chiras@nxp.com> <1565779731-1300-5-git-send-email-robert.chiras@nxp.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1565779731-1300-5-git-send-email-robert.chiras@nxp.com> Sender: linux-kernel-owner@vger.kernel.org To: Robert Chiras Cc: =?UTF-8?Q?Guido_G=C3=BCnther?= , Marek Vasut , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org List-Id: dri-devel@lists.freedesktop.org On 2019-08-14 12:48, Robert Chiras wrote: > Some of the regiters need, like LCDC_CTRL and CTRL2_OUTSTANDING_REQS Typo in registers, and there is a need to many. > needs to be properly cleared and initialized for a better start and stop > routine. > > Signed-off-by: Robert Chiras > --- > drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c > b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c > index b69ace8..5e44f57 100644 > --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c > +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c > @@ -127,6 +127,10 @@ static void mxsfb_enable_controller(struct > mxsfb_drm_private *mxsfb) > clk_prepare_enable(mxsfb->clk_disp_axi); > clk_prepare_enable(mxsfb->clk); > > + if (mxsfb->devdata->ipversion >= 4) > + writel(CTRL2_OUTSTANDING_REQS(REQ_16), > + mxsfb->base + LCDC_V4_CTRL2 + REG_SET); > + > /* If it was disabled, re-enable the mode again */ > writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_SET); > > @@ -136,12 +140,19 @@ static void mxsfb_enable_controller(struct > mxsfb_drm_private *mxsfb) > writel(reg, mxsfb->base + LCDC_VDCTRL4); > > writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_SET); > + writel(CTRL1_RECOVERY_ON_UNDERFLOW, mxsfb->base + LCDC_CTRL1 + REG_SET); This seems not to be accounted for in the commit message. Can you do this in a separate commit? Also I suggest to introduce CTRL1_RECOVERY_ON_UNDERFLOW in that same commit. -- Stefan > } > > static void mxsfb_disable_controller(struct mxsfb_drm_private *mxsfb) > { > u32 reg; > > + if (mxsfb->devdata->ipversion >= 4) > + writel(CTRL2_OUTSTANDING_REQS(0x7), > + mxsfb->base + LCDC_V4_CTRL2 + REG_CLR); > + > + writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_CLR); > + > /* > * Even if we disable the controller here, it will still continue > * until its FIFOs are running out of data > @@ -295,6 +306,7 @@ void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb) > dma_addr_t paddr; > > mxsfb_enable_axi_clk(mxsfb); > + writel(0, mxsfb->base + LCDC_CTRL); > mxsfb_crtc_mode_set_nofb(mxsfb); > > /* Write cur_buf as well to avoid an initial corrupt frame */