From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH 1/4] drm: add plane support Date: Thu, 21 Jul 2011 10:14:06 -0700 Message-ID: <20110721101406.0d9dd4ee@jbarnes-desktop> References: <1308600701-7442-1-git-send-email-jbarnes@virtuousgeek.org> <1308600701-7442-2-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from oproxy5-pub.bluehost.com (oproxy5-pub.bluehost.com [67.222.38.55]) by gabe.freedesktop.org (Postfix) with SMTP id 91F1F9E78F for ; Thu, 21 Jul 2011 10:14:11 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: Joonyoung Shim Cc: inki.dae@samsung.com, intel-gfx@lists.freedesktop.org, kyungmin.park@samsung.com, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org On Thu, 21 Jul 2011 19:30:00 +0900 Joonyoung Shim wrote: > Hi, > = > simple questions :) > = > 2011/6/21 Jesse Barnes : > > Planes are a bit like half-CRTCs. =A0They have a location and fb, but > > don't drive outputs directly. =A0Add support for handling them to the c= ore > > KMS code. > > > > Signed-off-by: Jesse Barnes > > --- > > =A0drivers/gpu/drm/drm_crtc.c | =A0235 ++++++++++++++++++++++++++++++++= +++++++++++- > > =A0drivers/gpu/drm/drm_drv.c =A0| =A0 =A03 + > > =A0include/drm/drm.h =A0 =A0 =A0 =A0 =A0| =A0 =A03 + > > =A0include/drm/drm_crtc.h =A0 =A0 | =A0 73 ++++++++++++++- > > =A0include/drm/drm_mode.h =A0 =A0 | =A0 35 +++++++ > > =A05 files changed, 346 insertions(+), 3 deletions(-) > > > = > snip > = > > diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h > > index c4961ea..fa6d348 100644 > > --- a/include/drm/drm_mode.h > > +++ b/include/drm/drm_mode.h > > @@ -120,6 +120,41 @@ struct drm_mode_crtc { > > =A0 =A0 =A0 =A0struct drm_mode_modeinfo mode; > > =A0}; > > > > +/* Planes blend with or override other bits on the CRTC */ > > +struct drm_mode_set_plane { > > + =A0 =A0 =A0 __u32 plane_id; > > + =A0 =A0 =A0 __u32 crtc_id; > > + =A0 =A0 =A0 __u32 fb_id; /* fb object contains surface format type */ > > + > > + =A0 =A0 =A0 /* Signed dest location allows it to be partially off scr= een */ > > + =A0 =A0 =A0 __s32 crtc_x, crtc_y; > = > Is this location offset from base(0, 0) of fb for plane, or from base > of crtc(mode)? This is the offset on the crtc specifically (which could be displaying a nonzero offset of a given fb). > = > > + =A0 =A0 =A0 __u32 crtc_w, crtc_h; > = > What is it for? size of plane? These are the size of the rect on the crtc. It's possible to have say a small source fb that gets scaled to a different size on the crtc by the plane blender or display hardware. > = > > + > > + =A0 =A0 =A0 /* Source values are 16.16 fixed point */ > > + =A0 =A0 =A0 __u32 src_x, src_y; > > + =A0 =A0 =A0 __u32 src_h, src_w; > = > What are these for? These specify the offset and size of the rect used for the source area. This allows the sprite hardware to send a subregion to the plane blender for display on the crtc. > > + > > + =A0 =A0 =A0 __u32 zpos; > = > Is this for order of plane(overlay)? Yes. Hope that helps; most of the above came out of earlier review comments since some display hardware allows a lot of flexibility when displaying overlay planes. -- = Jesse Barnes, Intel Open Source Technology Center