From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 09/13] drm/i915: don't use gtt_pwrite on LLC cached objects Date: Sun, 6 Nov 2011 23:19:09 +0100 Message-ID: <20111106221909.GC5305@phenom.ffwll.local> References: <1320606840-21132-1-git-send-email-daniel.vetter@ffwll.ch> <1320606840-21132-10-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Chris Wilson Cc: Daniel Vetter , intel-gfx , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org On Sun, Nov 06, 2011 at 09:16:00PM +0000, Chris Wilson wrote: > On Sun, 6 Nov 2011 20:13:56 +0100, Daniel Vetter wrote: > > ~120 =B5s instead fo ~210 =B5s to write 1mb on my snb. I like this. > >=20 > > Signed-off-by: Daniel Vetter > > --- > > drivers/gpu/drm/i915/i915_gem.c | 1 + > > 1 files changed, 1 insertions(+), 0 deletions(-) > >=20 > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915= /i915_gem.c > > index 0048917..8fd175c 100644 > > --- a/drivers/gpu/drm/i915/i915_gem.c > > +++ b/drivers/gpu/drm/i915/i915_gem.c > > @@ -842,6 +842,7 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, v= oid *data, > > ret =3D i915_gem_phys_pwrite(dev, obj, args, file); > > goto out; > > } else if (obj->gtt_space && > > + obj->cache_level =3D=3D I915_CACHE_NONE && > > obj->base.write_domain !=3D I915_GEM_DOMAIN_CPU) { > > ret =3D i915_gem_object_pin(obj, 0, true); > > if (ret) >=20 > I still think you want to include a obj->map_and_fenceable test here. > When doing 2D benchmarks the stall incurred here to evict an old obje= ct > map the to-be-written object into the mappable GTT causes measureable > pain (obviously on non-LLC architectures). That's one of "further tricks". I think we need to also implement the s= ame in-place clflush trick like for pread, too, to avoid penalizing partial pwrites too much. The other trick is to do reloc fixups through llc/clflushed cpu writes. This way we'd completely eliminate mappable pressure for all untiled objects. The only thing left would be scanout, tiled gtt uploads and ti= led blts (only on pre-gen4). -Daniel --=20 Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48