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From: Luca Tettamanti <kronos.it@gmail.com>
To: Alex Deucher <alexdeucher@gmail.com>
Cc: Mailing list - DRI developers <dri-devel@lists.freedesktop.org>
Subject: Re: radeon testing
Date: Tue, 21 Aug 2012 22:33:36 +0200	[thread overview]
Message-ID: <20120821203336.GA5086@growl> (raw)
In-Reply-To: <CADnq5_N1=NkDp6rTEB9b8FNhYztW7qY53kEC_TDgLvKHTAybbA@mail.gmail.com>

On Tue, Aug 21, 2012 at 09:51:46AM -0400, Alex Deucher wrote:
> On Mon, Aug 20, 2012 at 3:30 PM, Luca Tettamanti <kronos.it@gmail.com> wrote:
> > Any printk between evergreen_mc_stop and evergreen_mc_resume locks up
> > the machine. The likely culprit is commit 023e188e:
> 
> yeah, vram is locked out at that point.  I guess we probably need to
> block anyone from trying to access it.

I see; the 2 dev_warn would probably lock up the machine as well right?

> > I haven't tried backing out the commit yet, but looking at the diff I
> > see that you call radeon_wait_for_vblank and radeon_get_vblank_counter,
> > but evergreen_mc_program is called way before IRQ is set up. Is the
> > vblank counter running? Looks like we just hitting the timeout here...
> 
> We aren't waiting for an interrupt, just polling the current crtc
> status until it enters the vblank region.  The status and counters
> should be working as we only wait on displays that are enabled.

It appears that all the crtcs are considered active:

[    4.260766] crtc 0 enabled 272696081 (this is the value of crtc_enabled)
[    4.260766] crtc 0 wait for vblank 0x1 (0x1 means no timeout)
[    4.260766] crtc 0: waited 33 [100000] (number of loops of radeon_get_vblank_counter)
[    4.260766] crtc 1 enabled 272630544
[    4.260766] crtc 1 wait for vblank 0x1
[    4.260766] crtc 1: waited 100000 [100000]
[    4.260766] crtc 2 enabled 4195088
[    4.260766] crtc 2 wait for vblank 0x1
[    4.260766] crtc 2: waited 100000 [100000]
[    4.260766] crtc 3 enabled 4195088
[    4.260766] crtc 3 wait for vblank 0x1
[    4.260766] crtc 3: waited 100000 [100000]
[    4.260766] crtc 4 enabled 4195088
[    4.260766] crtc 4 wait for vblank 0x1
[    4.260766] crtc 4: waited 100000 [100000]
[    4.260766] crtc 5 enabled 4195088
[    4.260766] crtc 5 wait for vblank 0x1
[    4.260766] crtc 5: waited 100000 [100000]

Maybe the code should be checking EVERGREEN_CRTC_MASTER_EN?

I'm testing this patch and the boot is fast again:

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 2308c7d..72bf721 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1251,7 +1251,8 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *sav
 	WREG32(VGA_RENDER_CONTROL, 0);
 	/* blank the display controllers */
 	for (i = 0; i < rdev->num_crtc; i++) {
-		crtc_enabled = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);
+		crtc_enabled = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]) &
+				EVERGREEN_CRTC_MASTER_EN;
 		if (crtc_enabled) {
 			save->crtc_enabled[i] = true;
 			if (ASIC_IS_DCE6(rdev)) {


Luca

  parent reply	other threads:[~2012-08-21 20:33 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-08-16 15:51 radeon testing Alex Deucher
2012-08-20 12:30 ` Luca Tettamanti
2012-08-20 14:24   ` Alex Deucher
2012-08-20 19:30     ` Luca Tettamanti
2012-08-21 13:51       ` Alex Deucher
2012-08-21 14:17         ` Christian König
2012-08-21 20:33         ` Luca Tettamanti [this message]
2012-08-21 20:39           ` Alex Deucher

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