* Monitor sync out of range with current Linux git tree
@ 2012-10-05 12:37 Markus Trippelsdorf
2012-10-05 13:14 ` Alex Deucher
0 siblings, 1 reply; 7+ messages in thread
From: Markus Trippelsdorf @ 2012-10-05 12:37 UTC (permalink / raw)
To: dri-devel
When I cold start my machine I see the following error message on my
monitor:
Out of Range
48.2kHz / 44Hz
I have to reboot on older kernel and kexec to the current one to get it
working again.
[drm] Initialized drm 1.1.0 20060810
[drm] radeon defaulting to kernel modesetting.
[drm] radeon kernel modesetting enabled.
[drm] initializing kernel modesetting (RS780 0x1002:0x9614 0x1043:0x834D).
[drm] register mmio base: 0xFBEE0000
[drm] register mmio size: 65536
ATOM BIOS: 113
radeon 0000:01:05.0: VRAM: 128M 0x00000000C0000000 - 0x00000000C7FFFFFF (128M used)
radeon 0000:01:05.0: GTT: 512M 0x00000000A0000000 - 0x00000000BFFFFFFF
[drm] Detected VRAM RAM=128M, BAR=128M
[drm] RAM width 32bits DDR
[TTM] Zone kernel: Available graphics memory: 4083554 kiB
[TTM] Zone dma32: Available graphics memory: 2097152 kiB
[TTM] Initializing pool allocator
[TTM] Initializing DMA pool allocator
[drm] radeon: 128M of VRAM memory ready
[drm] radeon: 512M of GTT memory ready.
[drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
[drm] Driver supports precise vblank timestamp query.
[drm] radeon: irq initialized.
[drm] GART: num cpu pages 131072, num gpu pages 131072
[drm] Loading RS780 Microcode
[drm] PCIE GART of 512M enabled (table at 0x00000000C0040000).
radeon 0000:01:05.0: WB enabled
radeon 0000:01:05.0: fence driver on ring 0 use gpu addr 0x00000000a0000c00 and cpu addr 0xffff880215c60c00
radeon 0000:01:05.0: setting latency timer to 64
[drm] ring test on 0 succeeded in 0 usecs
[drm] ib test on ring 0 succeeded in 0 usecs
[drm] Radeon Display Connectors
[drm] Connector 0:
[drm] VGA-1
[drm] DDC: 0x7e40 0x7e40 0x7e44 0x7e44 0x7e48 0x7e48 0x7e4c 0x7e4c
[drm] Encoders:
[drm] CRT1: INTERNAL_KLDSCP_DAC1
[drm] Connector 1:
[drm] DVI-D-1
[drm] HPD3
[drm] DDC: 0x7e50 0x7e50 0x7e54 0x7e54 0x7e58 0x7e58 0x7e5c 0x7e5c
[drm] Encoders:
[drm] DFP3: INTERNAL_KLDSCP_LVTMA
[drm] radeon: power management initialized
[drm] fb mappable at 0xF0142000
[drm] vram apper at 0xF0000000
[drm] size 7299072
[drm] fb depth is 24
[drm] pitch is 6912
fbcon: radeondrmfb (fb0) is primary device
Console: switching to colour frame buffer device 131x105
fb0: radeondrmfb frame buffer device
drm: registered panic notifier
[drm] Initialized radeon 2.24.0 20080528 for 0000:01:05.0 on minor 0
X.Org X Server 1.13.0
Release Date: 2012-09-05
...
[ 4.790] (II) [KMS] Kernel modesetting enabled.
[ 4.790] (WW) VGA arbiter: cannot open kernel arbiter, no multi-card support
[ 4.790] (II) RADEON(0): Creating default Display subsection in Screen section
"Default Screen Section" for depth/fbbpp 24/32
[ 4.790] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32
[ 4.790] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps)
[ 4.790] (==) RADEON(0): Default visual is TrueColor
[ 4.790] (==) RADEON(0): RGB weight 888
[ 4.790] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC)
[ 4.790] (--) RADEON(0): Chipset: "ATI Radeon HD 3300 Graphics" (ChipID = 0x9614)
[ 4.790] (II) RADEON(0): PCI card detected
[ 4.791] (II) Loading sub module "exa"
[ 4.791] (II) LoadModule: "exa"
[ 4.792] (II) Loading /usr/lib64/xorg/modules/libexa.so
[ 4.792] (II) Module exa: vendor="X.Org Foundation"
[ 4.792] compiled for 1.13.0, module version = 2.6.0
[ 4.792] ABI class: X.Org Video Driver, version 13.0
[ 4.792] (II) RADEON(0): KMS Color Tiling: enabled
[ 4.792] (II) RADEON(0): KMS Pageflipping: enabled
[ 4.792] (II) RADEON(0): SwapBuffers wait for vsync: enabled
[ 4.813] (II) RADEON(0): Output VGA-0 has no monitor section
[ 4.870] (II) RADEON(0): Output DVI-0 using monitor section DVI-0
[ 4.870] (**) RADEON(0): Option "Rotate" "left"
[ 4.890] (II) RADEON(0): EDID for output VGA-0
[ 4.950] (II) RADEON(0): EDID for output DVI-0
[ 4.950] (II) RADEON(0): Manufacturer: GSM Model: 4e48 Serial#: 148502
[ 4.950] (II) RADEON(0): Year: 2006 Week: 8
[ 4.950] (II) RADEON(0): EDID Version: 1.3
[ 4.950] (II) RADEON(0): Digital Display Input
[ 4.950] (II) RADEON(0): Max Image Size [cm]: horiz.: 43 vert.: 27
[ 4.950] (II) RADEON(0): Gamma: 2.20
[ 4.950] (II) RADEON(0): DPMS capabilities: StandBy Suspend Off
[ 4.950] (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4
[ 4.950] (II) RADEON(0): First detailed timing is preferred mode
[ 4.950] (II) RADEON(0): redX: 0.651 redY: 0.333 greenX: 0.277 greenY: 0.614
[ 4.950] (II) RADEON(0): blueX: 0.145 blueY: 0.082 whiteX: 0.313 whiteY: 0.329
[ 4.950] (II) RADEON(0): Supported established timings:
[ 4.950] (II) RADEON(0): 720x400@70Hz
[ 4.950] (II) RADEON(0): 640x480@60Hz
[ 4.950] (II) RADEON(0): 640x480@75Hz
[ 4.950] (II) RADEON(0): 800x600@56Hz
[ 4.950] (II) RADEON(0): 800x600@60Hz
[ 4.950] (II) RADEON(0): 800x600@75Hz
[ 4.950] (II) RADEON(0): 832x624@75Hz
[ 4.950] (II) RADEON(0): 1024x768@60Hz
[ 4.950] (II) RADEON(0): 1024x768@75Hz
[ 4.950] (II) RADEON(0): 1280x1024@75Hz
[ 4.950] (II) RADEON(0): 1152x864@75Hz
[ 4.950] (II) RADEON(0): Manufacturer's mask: 0
[ 4.950] (II) RADEON(0): Supported standard timings:
[ 4.950] (II) RADEON(0): #1: hsize: 1280 vsize 1024 refresh: 60 vid: 32897
[ 4.950] (II) RADEON(0): #2: hsize: 1280 vsize 960 refresh: 60 vid: 16513
[ 4.950] (II) RADEON(0): #3: hsize: 1152 vsize 864 refresh: 75 vid: 20337
[ 4.950] (II) RADEON(0): Supported detailed timing:
[ 4.950] (II) RADEON(0): clock: 146.2 MHz Image Size: 434 x 270 mm
[ 4.950] (II) RADEON(0): h_active: 1680 h_sync: 1784 h_sync_end 1960 h_blank_end 2240 h_border: 0
[ 4.950] (II) RADEON(0): v_active: 1050 v_sync: 1053 v_sync_end 1059 v_blanking: 1089 v_border: 0
[ 4.950] (II) RADEON(0): Ranges: V min: 56 V max: 75 Hz, H min: 28 H max: 83 kHz, PixClock max 155 MHz
[ 4.950] (II) RADEON(0): Monitor name: L204WT
[ 4.950] (II) RADEON(0): Monitor name:
[ 4.950] (II) RADEON(0): EDID (in hex):
[ 4.950] (II) RADEON(0): 00ffffffffffff001e6d484e16440200
[ 4.950] (II) RADEON(0): 08100103ea2b1b78ead105a655479d25
[ 4.950] (II) RADEON(0): 155054a76b80010181808140714f0101
[ 4.950] (II) RADEON(0): 01010101010121399030621a274068b0
[ 4.950] (II) RADEON(0): 3600b20e1100001c000000fd00384b1c
[ 4.950] (II) RADEON(0): 530f000a202020202020000000fc004c
[ 4.950] (II) RADEON(0): 32303457540a202020202020000000fc
[ 4.950] (II) RADEON(0): 000a2020202020202020202020200051
[ 4.950] (II) RADEON(0): Printing probed modes for output DVI-0
[ 4.950] (II) RADEON(0): Modeline "1680x1050"x60.0 146.25 1680 1784 1960 2240 1050 1053 1059 1089 -hsync +vsync (65.3 kHz eP)
[ 4.951] (II) RADEON(0): Modeline "1680x945"x60.0 131.48 1680 1784 1960 2240 945 946 949 978 -hsync +vsync (58.7 kHz)
[ 4.951] (II) RADEON(0): Modeline "1400x1050"x59.9 101.00 1400 1448 1480 1560 1050 1053 1057 1080 +hsync -vsync (64.7 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1600x900"x60.0 118.96 1600 1696 1864 2128 900 901 904 932 -hsync +vsync (55.9 kHz)
[ 4.951] (II) RADEON(0): Modeline "1280x1024"x75.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1280x1024"x60.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1440x900"x75.0 136.75 1440 1536 1688 1936 900 903 909 942 -hsync +vsync (70.6 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1440x900"x59.9 88.75 1440 1488 1520 1600 900 903 909 926 +hsync -vsync (55.5 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1280x960"x60.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1366x768"x60.0 85.89 1366 1439 1583 1800 768 769 772 795 -hsync +vsync (47.7 kHz)
[ 4.951] (II) RADEON(0): Modeline "1360x768"x60.0 85.50 1360 1424 1536 1792 768 771 777 795 +hsync +vsync (47.7 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1280x800"x74.9 106.50 1280 1360 1488 1696 800 803 809 838 -hsync +vsync (62.8 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1280x800"x59.9 71.00 1280 1328 1360 1440 800 803 809 823 +hsync -vsync (49.3 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1152x864"x75.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1280x768"x74.9 102.25 1280 1360 1488 1696 768 771 778 805 +hsync -vsync (60.3 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1280x768"x60.0 68.25 1280 1328 1360 1440 768 771 778 790 +hsync -vsync (47.4 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1024x768"x75.1 78.80 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.1 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1024x768"x70.1 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e)
[ 4.951] (II) RADEON(0): Modeline "1024x576"x60.0 46.97 1024 1064 1168 1312 576 577 580 597 -hsync +vsync (35.8 kHz)
[ 4.951] (II) RADEON(0): Modeline "832x624"x74.6 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e)
[ 4.951] (II) RADEON(0): Modeline "800x600"x72.2 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e)
[ 4.951] (II) RADEON(0): Modeline "800x600"x75.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e)
[ 4.951] (II) RADEON(0): Modeline "800x600"x60.3 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e)
[ 4.951] (II) RADEON(0): Modeline "800x600"x56.2 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e)
[ 4.951] (II) RADEON(0): Modeline "848x480"x60.0 33.75 848 864 976 1088 480 486 494 517 +hsync +vsync (31.0 kHz e)
[ 4.951] (II) RADEON(0): Modeline "640x480"x72.8 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e)
[ 4.951] (II) RADEON(0): Modeline "640x480"x75.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e)
[ 4.951] (II) RADEON(0): Modeline "640x480"x60.0 25.20 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e)
[ 4.951] (II) RADEON(0): Modeline "720x400"x70.1 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e)
[ 4.951] (II) RADEON(0): Output VGA-0 disconnected
[ 4.951] (II) RADEON(0): Output DVI-0 connected
[ 4.951] (II) RADEON(0): Using exact sizes for initial modes
[ 4.951] (II) RADEON(0): Output DVI-0 using initial mode 1680x1050
[ 4.951] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
[ 4.951] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:8000000 visible:78ca000
[ 4.951] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM
[ 4.951] (==) RADEON(0): DPI set to (96, 96)
[ 4.951] (II) Loading sub module "fb"
[ 4.951] (II) LoadModule: "fb"
[ 4.951] (II) Loading /usr/lib64/xorg/modules/libfb.so
[ 4.953] (II) Module fb: vendor="X.Org Foundation"
[ 4.953] compiled for 1.13.0, module version = 1.0.0
[ 4.953] ABI class: X.Org ANSI C Emulation, version 0.4
[ 4.953] (II) Loading sub module "ramdac"
[ 4.953] (II) LoadModule: "ramdac"
[ 4.953] (II) Module "ramdac" already built-in
[ 4.953] (--) Depth 24 pixmap format is 32 bpp
[ 4.954] (II) RADEON(0): [DRI2] Setup complete
[ 4.954] (II) RADEON(0): [DRI2] DRI driver: r600
[ 4.954] (II) RADEON(0): [DRI2] VDPAU driver: r600
[ 4.954] (II) RADEON(0): Front buffer size: 6932K
[ 4.954] (II) RADEON(0): VRAM usage limit set to 105080K
[ 4.955] (==) RADEON(0): Backing store disabled
[ 4.955] (II) RADEON(0): Direct rendering enabled
[ 4.956] (II) RADEON(0): Setting EXA maxPitchBytes
[ 4.956] (II) EXA(0): Driver allocated offscreen pixmaps
[ 4.956] (II) EXA(0): Driver registered support for the following operations:
[ 4.956] (II) Solid
[ 4.956] (II) Copy
[ 4.956] (II) Composite (RENDER acceleration)
[ 4.956] (II) UploadToScreen
[ 4.956] (II) DownloadFromScreen
[ 4.956] (II) RADEON(0): Acceleration enabled
[ 4.956] (==) RADEON(0): DPMS enabled
[ 4.956] (==) RADEON(0): Silken mouse enabled
[ 4.957] (II) RADEON(0): Set up textured video
[ 4.957] (II) RADEON(0): [XvMC] Associated with Radeon Textured Video.
[ 4.958] (II) RADEON(0): [XvMC] Extension initialized.
[ 4.958] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message.
[ 4.958] (--) RandR disabled
[ 5.046] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer
[ 5.046] (II) AIGLX: enabled GLX_INTEL_swap_event
[ 5.046] (II) AIGLX: enabled GLX_ARB_create_context
[ 5.046] (II) AIGLX: enabled GLX_ARB_create_context_profile
[ 5.046] (II) AIGLX: enabled GLX_EXT_create_context_es2_profile
[ 5.046] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
[ 5.046] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
[ 5.047] (II) AIGLX: Loaded and initialized r600
[ 5.047] (II) GLX: Initialized DRI2 GL provider for screen 0
[ 5.053] (II) RADEON(0): Setting screen physical size to 277 x 444
[ 5.146] (II) Using input driver 'mouse' for '<default pointer>'
[ 5.146] (**) Option "CorePointer" "on"
[ 5.146] (**) <default pointer>: always reports core events
[ 5.146] (WW) <default pointer>: No Device specified, looking for one...
[ 5.176] (II) <default pointer>: Setting Device option to "/dev/input/mice"
[ 5.176] (--) <default pointer>: Device: "/dev/input/mice"
[ 5.176] (==) <default pointer>: Protocol: "Auto"
[ 5.176] (**) <default pointer>: always reports core events
[ 5.176] (**) Option "Device" "/dev/input/mice"
[ 5.230] (==) <default pointer>: Emulate3Buttons, Emulate3Timeout: 50
[ 5.230] (**) <default pointer>: ZAxisMapping: buttons 4 and 5
[ 5.230] (**) <default pointer>: Buttons: 9
[ 5.230] (II) XINPUT: Adding extended input device "<default pointer>" (type: MOUSE, id 6)
[ 5.230] (**) <default pointer>: (accel) keeping acceleration scheme 1
[ 5.230] (**) <default pointer>: (accel) acceleration profile 0
[ 5.230] (**) <default pointer>: (accel) acceleration factor: 2.000
[ 5.230] (**) <default pointer>: (accel) acceleration threshold: 4
[ 5.230] (II) <default pointer>: Setting mouse protocol to "ExplorerPS/2"
[ 5.523] (II) <default pointer>: ps2EnableDataReporting: succeeded
[ 5.523] (II) Using input driver 'kbd' for '<default keyboard>'
[ 5.523] (**) Option "CoreKeyboard" "on"
[ 5.523] (**) <default keyboard>: always reports core events
[ 5.523] (**) <default keyboard>: always reports core events
[ 5.523] (**) Option "Protocol" "standard"
[ 5.523] (**) Option "XkbRules" "base"
[ 5.523] (**) Option "XkbModel" "pc105"
[ 5.523] (**) Option "XkbLayout" "us"
[ 5.523] (II) XINPUT: Adding extended input device "<default keyboard>" (type: KEYBOARD, id 7)
--
Markus
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: Monitor sync out of range with current Linux git tree
2012-10-05 12:37 Monitor sync out of range with current Linux git tree Markus Trippelsdorf
@ 2012-10-05 13:14 ` Alex Deucher
2012-10-05 13:38 ` Markus Trippelsdorf
0 siblings, 1 reply; 7+ messages in thread
From: Alex Deucher @ 2012-10-05 13:14 UTC (permalink / raw)
To: Markus Trippelsdorf; +Cc: dri-devel
On Fri, Oct 5, 2012 at 8:37 AM, Markus Trippelsdorf
<markus@trippelsdorf.de> wrote:
> When I cold start my machine I see the following error message on my
> monitor:
>
> Out of Range
> 48.2kHz / 44Hz
>
> I have to reboot on older kernel and kexec to the current one to get it
> working again.
I don't see anything amiss; can you bisect?
Alex
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: Monitor sync out of range with current Linux git tree
2012-10-05 13:14 ` Alex Deucher
@ 2012-10-05 13:38 ` Markus Trippelsdorf
2012-10-05 14:02 ` Alex Deucher
0 siblings, 1 reply; 7+ messages in thread
From: Markus Trippelsdorf @ 2012-10-05 13:38 UTC (permalink / raw)
To: Alex Deucher; +Cc: dri-devel
On 2012.10.05 at 09:14 -0400, Alex Deucher wrote:
> On Fri, Oct 5, 2012 at 8:37 AM, Markus Trippelsdorf
> <markus@trippelsdorf.de> wrote:
> > When I cold start my machine I see the following error message on my
> > monitor:
> >
> > Out of Range
> > 48.2kHz / 44Hz
> >
> > I have to reboot on older kernel and kexec to the current one to get it
> > working again.
>
> I don't see anything amiss; can you bisect?
Yes. It's your commit:
commit 9dbbcfc6894957fdbb311ba92c85c026659878b5
Author: Alex Deucher <alexander.deucher@amd.com>
Date: Wed Sep 12 17:39:57 2012 -0400
drm/radeon/dce3: use a single PPLL for all DP displays
--
Markus
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: Monitor sync out of range with current Linux git tree
2012-10-05 13:38 ` Markus Trippelsdorf
@ 2012-10-05 14:02 ` Alex Deucher
2012-10-05 14:15 ` Markus Trippelsdorf
0 siblings, 1 reply; 7+ messages in thread
From: Alex Deucher @ 2012-10-05 14:02 UTC (permalink / raw)
To: Markus Trippelsdorf; +Cc: dri-devel
[-- Attachment #1: Type: text/plain, Size: 818 bytes --]
On Fri, Oct 5, 2012 at 9:38 AM, Markus Trippelsdorf
<markus@trippelsdorf.de> wrote:
> On 2012.10.05 at 09:14 -0400, Alex Deucher wrote:
>> On Fri, Oct 5, 2012 at 8:37 AM, Markus Trippelsdorf
>> <markus@trippelsdorf.de> wrote:
>> > When I cold start my machine I see the following error message on my
>> > monitor:
>> >
>> > Out of Range
>> > 48.2kHz / 44Hz
>> >
>> > I have to reboot on older kernel and kexec to the current one to get it
>> > working again.
>>
>> I don't see anything amiss; can you bisect?
>
> Yes. It's your commit:
>
> commit 9dbbcfc6894957fdbb311ba92c85c026659878b5
> Author: Alex Deucher <alexander.deucher@amd.com>
> Date: Wed Sep 12 17:39:57 2012 -0400
>
> drm/radeon/dce3: use a single PPLL for all DP displays
Can you apply the attached patch and send me the output?
Thanks,
Alex
[-- Attachment #2: 0001-pll-debug.patch --]
[-- Type: text/x-diff, Size: 5375 bytes --]
From 730c061b3983fab93141a84a82f1e478c9e90990 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@amd.com>
Date: Thu, 27 Sep 2012 10:56:48 -0400
Subject: [PATCH] pll debug
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/atombios_crtc.c | 21 ++++++++++++++++++++-
1 files changed, 20 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 96184d0..1f7e5fe 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1565,6 +1565,10 @@ static int radeon_get_shared_nondp_ppll(struct drm_crtc *crtc)
!ENCODER_MODE_IS_DP(atombios_get_encoder_mode(test_radeon_crtc->encoder))) {
/* check if we are already driving this connector with another crtc */
if (test_radeon_crtc->connector == radeon_crtc->connector) {
+ DRM_INFO("crtc %d and crtc %d (0x%x) both driving %s\n",
+ radeon_crtc->crtc_id, test_radeon_crtc->crtc_id,
+ test_radeon_crtc->pll_id,
+ drm_get_connector_name(radeon_crtc->connector));
/* if we are, return that pll */
if (test_radeon_crtc->pll_id != ATOM_PPLL_INVALID)
return test_radeon_crtc->pll_id;
@@ -1574,8 +1578,10 @@ static int radeon_get_shared_nondp_ppll(struct drm_crtc *crtc)
if ((crtc->mode.clock == test_crtc->mode.clock) &&
(adjusted_clock == test_adjusted_clock) &&
(radeon_crtc->ss_enabled == test_radeon_crtc->ss_enabled) &&
- (test_radeon_crtc->pll_id != ATOM_PPLL_INVALID))
+ (test_radeon_crtc->pll_id != ATOM_PPLL_INVALID)) {
+ DRM_INFO("found pll 0x%x with matched clock\n", test_radeon_crtc->pll_id);
return test_radeon_crtc->pll_id;
+ }
}
}
return ATOM_PPLL_INVALID;
@@ -1631,6 +1637,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
/* UNIPHY A uses PPLL2 */
return ATOM_PPLL2;
else if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) {
+ DRM_INFO("crtc %d is DP\n", radeon_crtc->crtc_id);
/* UNIPHY B/C/D/E/F */
if (rdev->clock.dp_extclk)
/* skip PPLL programming if using ext clock */
@@ -1642,6 +1649,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
return pll;
}
} else {
+ DRM_INFO("crtc %d is not DP\n", radeon_crtc->crtc_id);
/* use the same PPLL for all monitors with the same clock */
pll = radeon_get_shared_nondp_ppll(crtc);
if (pll != ATOM_PPLL_INVALID)
@@ -1649,6 +1657,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
}
/* UNIPHY B/C/D/E/F */
pll_in_use = radeon_get_pll_use_mask(crtc);
+ DRM_INFO("plls in use 0x%x\n", pll_in_use);
if (!(pll_in_use & (1 << ATOM_PPLL0)))
return ATOM_PPLL0;
if (!(pll_in_use & (1 << ATOM_PPLL1)))
@@ -1667,6 +1676,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
* crtc virtual pixel clock.
*/
if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) {
+ DRM_INFO("crtc %d is DP\n", radeon_crtc->crtc_id);
if (rdev->clock.dp_extclk)
/* skip PPLL programming if using ext clock */
return ATOM_PPLL_INVALID;
@@ -1683,6 +1693,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
return pll;
}
} else {
+ DRM_INFO("crtc %d is not DP\n", radeon_crtc->crtc_id);
/* use the same PPLL for all monitors with the same clock */
pll = radeon_get_shared_nondp_ppll(crtc);
if (pll != ATOM_PPLL_INVALID)
@@ -1690,6 +1701,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
}
/* all other cases */
pll_in_use = radeon_get_pll_use_mask(crtc);
+ DRM_INFO("plls in use 0x%x\n", pll_in_use);
if (!(pll_in_use & (1 << ATOM_PPLL2)))
return ATOM_PPLL2;
if (!(pll_in_use & (1 << ATOM_PPLL1)))
@@ -1703,11 +1715,13 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
* DCE3: PPLL1 or PPLL2
*/
if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) {
+ DRM_INFO("crtc %d is DP\n", radeon_crtc->crtc_id);
/* use the same PPLL for all DP monitors */
pll = radeon_get_shared_dp_ppll(crtc);
if (pll != ATOM_PPLL_INVALID)
return pll;
} else {
+ DRM_INFO("crtc %d is not DP\n", radeon_crtc->crtc_id);
/* use the same PPLL for all monitors with the same clock */
pll = radeon_get_shared_nondp_ppll(crtc);
if (pll != ATOM_PPLL_INVALID)
@@ -1715,6 +1729,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
}
/* all other cases */
pll_in_use = radeon_get_pll_use_mask(crtc);
+ DRM_INFO("plls in use 0x%x\n", pll_in_use);
if (!(pll_in_use & (1 << ATOM_PPLL2)))
return ATOM_PPLL2;
if (!(pll_in_use & (1 << ATOM_PPLL1)))
@@ -1811,7 +1826,11 @@ static bool atombios_crtc_mode_fixup(struct drm_crtc *crtc,
if (!atombios_crtc_prepare_pll(crtc, adjusted_mode))
return false;
/* pick pll */
+ DRM_INFO("== start crtc %d driving %s ==\n", radeon_crtc->crtc_id,
+ drm_get_connector_name(radeon_crtc->connector));
radeon_crtc->pll_id = radeon_atom_pick_pll(crtc);
+ DRM_INFO("crtc %d using pll 0x%x\n", radeon_crtc->crtc_id, radeon_crtc->pll_id);
+ DRM_INFO("== end crtc %d ==\n", radeon_crtc->crtc_id);
/* if we can't get a PPLL for a non-DP encoder, fail */
if ((radeon_crtc->pll_id == ATOM_PPLL_INVALID) &&
!ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder)))
--
1.7.7.5
[-- Attachment #3: Type: text/plain, Size: 159 bytes --]
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: Monitor sync out of range with current Linux git tree
2012-10-05 14:02 ` Alex Deucher
@ 2012-10-05 14:15 ` Markus Trippelsdorf
2012-10-05 14:25 ` Alex Deucher
0 siblings, 1 reply; 7+ messages in thread
From: Markus Trippelsdorf @ 2012-10-05 14:15 UTC (permalink / raw)
To: Alex Deucher; +Cc: dri-devel
On 2012.10.05 at 10:02 -0400, Alex Deucher wrote:
> On Fri, Oct 5, 2012 at 9:38 AM, Markus Trippelsdorf
> <markus@trippelsdorf.de> wrote:
> > On 2012.10.05 at 09:14 -0400, Alex Deucher wrote:
> >> On Fri, Oct 5, 2012 at 8:37 AM, Markus Trippelsdorf
> >> <markus@trippelsdorf.de> wrote:
> >> > When I cold start my machine I see the following error message on my
> >> > monitor:
> >> >
> >> > Out of Range
> >> > 48.2kHz / 44Hz
> >> >
> >> > I have to reboot on older kernel and kexec to the current one to get it
> >> > working again.
> >>
> >> I don't see anything amiss; can you bisect?
> >
> > Yes. It's your commit:
> >
> > commit 9dbbcfc6894957fdbb311ba92c85c026659878b5
> > Author: Alex Deucher <alexander.deucher@amd.com>
> > Date: Wed Sep 12 17:39:57 2012 -0400
> >
> > drm/radeon/dce3: use a single PPLL for all DP displays
>
> Can you apply the attached patch and send me the output?
[drm] == start crtc 0 driving DVI-D-1 ==
[drm] crtc 0 is not DP
[drm] plls in use 0x0
[drm] crtc 0 using pll 0x1
[drm] == end crtc 0 ==
--
Markus
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: Monitor sync out of range with current Linux git tree
2012-10-05 14:15 ` Markus Trippelsdorf
@ 2012-10-05 14:25 ` Alex Deucher
2012-10-05 14:29 ` Markus Trippelsdorf
0 siblings, 1 reply; 7+ messages in thread
From: Alex Deucher @ 2012-10-05 14:25 UTC (permalink / raw)
To: Markus Trippelsdorf; +Cc: dri-devel
[-- Attachment #1: Type: text/plain, Size: 1208 bytes --]
On Fri, Oct 5, 2012 at 10:15 AM, Markus Trippelsdorf
<markus@trippelsdorf.de> wrote:
> On 2012.10.05 at 10:02 -0400, Alex Deucher wrote:
>> On Fri, Oct 5, 2012 at 9:38 AM, Markus Trippelsdorf
>> <markus@trippelsdorf.de> wrote:
>> > On 2012.10.05 at 09:14 -0400, Alex Deucher wrote:
>> >> On Fri, Oct 5, 2012 at 8:37 AM, Markus Trippelsdorf
>> >> <markus@trippelsdorf.de> wrote:
>> >> > When I cold start my machine I see the following error message on my
>> >> > monitor:
>> >> >
>> >> > Out of Range
>> >> > 48.2kHz / 44Hz
>> >> >
>> >> > I have to reboot on older kernel and kexec to the current one to get it
>> >> > working again.
>> >>
>> >> I don't see anything amiss; can you bisect?
>> >
>> > Yes. It's your commit:
>> >
>> > commit 9dbbcfc6894957fdbb311ba92c85c026659878b5
>> > Author: Alex Deucher <alexander.deucher@amd.com>
>> > Date: Wed Sep 12 17:39:57 2012 -0400
>> >
>> > drm/radeon/dce3: use a single PPLL for all DP displays
>>
>> Can you apply the attached patch and send me the output?
>
> [drm] == start crtc 0 driving DVI-D-1 ==
> [drm] crtc 0 is not DP
> [drm] plls in use 0x0
> [drm] crtc 0 using pll 0x1
> [drm] == end crtc 0 ==
Does the attached patch fix the issue?
Alex
[-- Attachment #2: 0001-drm-radeon-allocate-PPLLs-from-low-to-high.patch --]
[-- Type: text/x-diff, Size: 1662 bytes --]
From 22044ce8b98127eea9761f3dd86d70abe7dd0a09 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@amd.com>
Date: Fri, 5 Oct 2012 10:22:02 -0400
Subject: [PATCH] drm/radeon: allocate PPLLs from low to high
The order shouldn't matter, but there have been problems
reported on certain older asics. This behaves more
like the original code before the PPLL allocation
rework.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/atombios_crtc.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 96184d0..2e566e1 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1690,10 +1690,10 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
}
/* all other cases */
pll_in_use = radeon_get_pll_use_mask(crtc);
- if (!(pll_in_use & (1 << ATOM_PPLL2)))
- return ATOM_PPLL2;
if (!(pll_in_use & (1 << ATOM_PPLL1)))
return ATOM_PPLL1;
+ if (!(pll_in_use & (1 << ATOM_PPLL2)))
+ return ATOM_PPLL2;
DRM_ERROR("unable to allocate a PPLL\n");
return ATOM_PPLL_INVALID;
} else {
@@ -1715,10 +1715,10 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
}
/* all other cases */
pll_in_use = radeon_get_pll_use_mask(crtc);
- if (!(pll_in_use & (1 << ATOM_PPLL2)))
- return ATOM_PPLL2;
if (!(pll_in_use & (1 << ATOM_PPLL1)))
return ATOM_PPLL1;
+ if (!(pll_in_use & (1 << ATOM_PPLL2)))
+ return ATOM_PPLL2;
DRM_ERROR("unable to allocate a PPLL\n");
return ATOM_PPLL_INVALID;
} else {
--
1.7.7.5
[-- Attachment #3: Type: text/plain, Size: 159 bytes --]
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: Monitor sync out of range with current Linux git tree
2012-10-05 14:25 ` Alex Deucher
@ 2012-10-05 14:29 ` Markus Trippelsdorf
0 siblings, 0 replies; 7+ messages in thread
From: Markus Trippelsdorf @ 2012-10-05 14:29 UTC (permalink / raw)
To: Alex Deucher; +Cc: dri-devel
On 2012.10.05 at 10:25 -0400, Alex Deucher wrote:
> On Fri, Oct 5, 2012 at 10:15 AM, Markus Trippelsdorf
> <markus@trippelsdorf.de> wrote:
> > On 2012.10.05 at 10:02 -0400, Alex Deucher wrote:
> >> On Fri, Oct 5, 2012 at 9:38 AM, Markus Trippelsdorf
> >> <markus@trippelsdorf.de> wrote:
> >> > On 2012.10.05 at 09:14 -0400, Alex Deucher wrote:
> >> >> On Fri, Oct 5, 2012 at 8:37 AM, Markus Trippelsdorf
> >> >> <markus@trippelsdorf.de> wrote:
> >> >> > When I cold start my machine I see the following error message on my
> >> >> > monitor:
> >> >> >
> >> >> > Out of Range
> >> >> > 48.2kHz / 44Hz
> >> >> >
> >> >> > I have to reboot on older kernel and kexec to the current one to get it
> >> >> > working again.
> >> >>
> >> >> I don't see anything amiss; can you bisect?
> >> >
> >> > Yes. It's your commit:
> >> >
> >> > commit 9dbbcfc6894957fdbb311ba92c85c026659878b5
> >> > Author: Alex Deucher <alexander.deucher@amd.com>
> >> > Date: Wed Sep 12 17:39:57 2012 -0400
> >> >
> >> > drm/radeon/dce3: use a single PPLL for all DP displays
> >>
> >> Can you apply the attached patch and send me the output?
> >
> > [drm] == start crtc 0 driving DVI-D-1 ==
> > [drm] crtc 0 is not DP
> > [drm] plls in use 0x0
> > [drm] crtc 0 using pll 0x1
> > [drm] == end crtc 0 ==
>
> Does the attached patch fix the issue?
Yes. Thanks Alex.
--
Markus
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2012-10-05 14:29 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-10-05 12:37 Monitor sync out of range with current Linux git tree Markus Trippelsdorf
2012-10-05 13:14 ` Alex Deucher
2012-10-05 13:38 ` Markus Trippelsdorf
2012-10-05 14:02 ` Alex Deucher
2012-10-05 14:15 ` Markus Trippelsdorf
2012-10-05 14:25 ` Alex Deucher
2012-10-05 14:29 ` Markus Trippelsdorf
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).