* [drm-intel:drm-intel-next-queued 242/253] drivers/gpu/drm/i915/intel_ringbuffer.c:1478:3-25: duplicated argument to & or |
[not found] <509515e6.N0eHL/iMUJaBRF+a%yuanhan.liu@linux.intel.com>
@ 2012-11-03 13:21 ` Fengguang Wu
0 siblings, 0 replies; only message in thread
From: Fengguang Wu @ 2012-11-03 13:21 UTC (permalink / raw)
To: Jesse Barnes; +Cc: Daniel Vetter, dri-devel
Hi Jesse,
FYI, there are coccinelle warnings in
tree: git://people.freedesktop.org/~danvet/drm-intel.git drm-intel-next-queued
head: 25fb73785b14593a79198af6ed702cf15dd16e6e
commit: eba434781d68ce562aa64c423876958e6c707c84 [242/253] drm/i915: TLB invalidation with MI_FLUSH_DW requires a post-sync op
+ drivers/gpu/drm/i915/intel_ringbuffer.c:1478:3-25: duplicated argument to & or |
vim +1478 drivers/gpu/drm/i915/intel_ringbuffer.c
71a77e07 Chris Wilson 2011-02-02 1462 uint32_t cmd;
b72f3acb Chris Wilson 2011-01-04 1463 int ret;
b72f3acb Chris Wilson 2011-01-04 1464
6a233c78 Daniel Vetter 2011-12-14 1465 ret = intel_ring_begin(ring, 4);
b72f3acb Chris Wilson 2011-01-04 1466 if (ret)
b72f3acb Chris Wilson 2011-01-04 1467 return ret;
b72f3acb Chris Wilson 2011-01-04 1468
71a77e07 Chris Wilson 2011-02-02 1469 cmd = MI_FLUSH_DW;
eba43478 Jesse Barnes 2012-10-26 1470 /*
eba43478 Jesse Barnes 2012-10-26 1471 * Bspec vol 1c.3 - blitter engine command streamer:
eba43478 Jesse Barnes 2012-10-26 1472 * "If ENABLED, all TLBs will be invalidated once the flush
eba43478 Jesse Barnes 2012-10-26 1473 * operation is complete. This bit is only valid when the
eba43478 Jesse Barnes 2012-10-26 1474 * Post-Sync Operation field is a value of 1h or 3h."
eba43478 Jesse Barnes 2012-10-26 1475 */
71a77e07 Chris Wilson 2011-02-02 1476 if (invalidate & I915_GEM_DOMAIN_RENDER)
eba43478 Jesse Barnes 2012-10-26 1477 cmd |= MI_INVALIDATE_TLB | MI_FLUSH_DW_STORE_INDEX |
eba43478 Jesse Barnes 2012-10-26 @1478 MI_FLUSH_DW_OP_STOREDW | MI_FLUSH_DW_OP_STOREDW;
71a77e07 Chris Wilson 2011-02-02 1479 intel_ring_emit(ring, cmd);
eba43478 Jesse Barnes 2012-10-26 1480 intel_ring_emit(ring, I915_GEM_HWS_SCRATCH_ADDR | MI_FLUSH_DW_USE_GTT);
b72f3acb Chris Wilson 2011-01-04 1481 intel_ring_emit(ring, 0);
71a77e07 Chris Wilson 2011-02-02 1482 intel_ring_emit(ring, MI_NOOP);
b72f3acb Chris Wilson 2011-01-04 1483 intel_ring_advance(ring);
b72f3acb Chris Wilson 2011-01-04 1484 return 0;
8d19215b Zou Nan hai 2010-11-02 1485 }
8d19215b Zou Nan hai 2010-11-02 1486
---
0-DAY kernel build testing backend Open Source Technology Center
Fengguang Wu, Yuanhan Liu Intel Corporation
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