From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: HDMI stereo support v5 Date: Fri, 20 Sep 2013 18:18:58 +0300 Message-ID: <20130920151858.GR4531@intel.com> References: <1379608835-11760-1-git-send-email-damien.lespiau@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Content-Disposition: inline In-Reply-To: <1379608835-11760-1-git-send-email-damien.lespiau@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Damien Lespiau Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org On Thu, Sep 19, 2013 at 05:40:15PM +0100, Damien Lespiau wrote: > v4 was: > http://lists.freedesktop.org/archives/dri-devel/2013-September/045340.html > = > Changes from v4: > = > - The kernel is now in charge of adjusting the stereo mode timings. > - There is a per-connector opt-in boolean to expose stereo modes, letti= ng > people enable stereo for each driver/connector. > - The series now depends on the latest bits from the drm-intel tree > - Removed the 2 buffers check that was judged unnecessary > - I realized that for frame packing modes (where you have to adjust the > vdisplay to be 2 * vdisplay + vblank) with a NTSC clock I was > reconstructing the clock without adjusting it by 1000 / 1001. Now tha= t the > timing computation is in the kernel, fixed it there. > - I also checked that we correctly match against the 2D CEA mode for th= e AVI > infoframes. The last bit to make it work was the introduction of crtc= _clock > to separate the original clock from the one computed by > drm_mode_set_crtcinfo() > - And finally, I booted with i915.fastboot=3D1 and discovered that the = pipe_src > register was getting clobbered, so fixed that as well Everything except patches 14 and 17: Reviewed-by: Ville Syrj=E4l=E4 One thing we're missing though is making sure the fb is big enough for the stereo adjusted primary plane size. -- = Ville Syrj=E4l=E4 Intel OTC