From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dan Carpenter Subject: re: drm/radeon: add support mc ucode loading on CIK (v2) Date: Wed, 5 Feb 2014 16:18:23 +0300 Message-ID: <20140205131823.GA800@elgon.mountain> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from aserp1040.oracle.com (aserp1040.oracle.com [141.146.126.69]) by gabe.freedesktop.org (Postfix) with ESMTP id 42A79106EB0 for ; Wed, 5 Feb 2014 05:18:36 -0800 (PST) Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org To: alexander.deucher@amd.com Cc: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org Hello Alex Deucher, The patch bc8273fe9701: "drm/radeon: add support mc ucode loading on CIK (v2)" from Jun 29, 2012, leads to the following static checker warning: drivers/gpu/drm/radeon/cik.c:1728 ci_mc_load_microcode() warn: we tested 'running' before and it was 'false' drivers/gpu/drm/radeon/cik.c 1727 if (running == 0) { ^^^^^^^^^^^^ 1728 if (running) { ^^^^^^^ Never true condition. 1729 blackout = RREG32(MC_SHARED_BLACKOUT_CNTL); 1730 WREG32(MC_SHARED_BLACKOUT_CNTL, blackout | 1); 1731 } 1732 1733 /* reset the engine and set to writable */ 1734 WREG32(MC_SEQ_SUP_CNTL, 0x00000008); 1735 WREG32(MC_SEQ_SUP_CNTL, 0x00000010); 1736 1737 /* load mc io regs */ 1738 for (i = 0; i < regs_size; i++) { 1739 WREG32(MC_SEQ_IO_DEBUG_INDEX, io_mc_regs[(i << 1)]); 1740 WREG32(MC_SEQ_IO_DEBUG_DATA, io_mc_regs[(i << 1) + 1]); 1741 } 1742 /* load the MC ucode */ 1743 fw_data = (const __be32 *)rdev->mc_fw->data; 1744 for (i = 0; i < ucode_size; i++) 1745 WREG32(MC_SEQ_SUP_PGM, be32_to_cpup(fw_data++)); 1746 1747 /* put the engine back into the active state */ 1748 WREG32(MC_SEQ_SUP_CNTL, 0x00000008); 1749 WREG32(MC_SEQ_SUP_CNTL, 0x00000004); 1750 WREG32(MC_SEQ_SUP_CNTL, 0x00000001); 1751 1752 /* wait for training to complete */ 1753 for (i = 0; i < rdev->usec_timeout; i++) { 1754 if (RREG32(MC_SEQ_TRAIN_WAKEUP_CNTL) & TRAIN_DONE_D0) 1755 break; 1756 udelay(1); 1757 } 1758 for (i = 0; i < rdev->usec_timeout; i++) { 1759 if (RREG32(MC_SEQ_TRAIN_WAKEUP_CNTL) & TRAIN_DONE_D1) 1760 break; 1761 udelay(1); 1762 } 1763 1764 if (running) ^^^^^^^ Same. 1765 WREG32(MC_SHARED_BLACKOUT_CNTL, blackout); 1766 } regards, dan carpenter