From mboxrd@z Thu Jan  1 00:00:00 1970
From: Lauri Kasanen <cand@gmx.com>
Subject: Re: [PATCH] drm/radeon: TTM must be init with cpu-visible VRAM
Date: Fri, 28 Feb 2014 17:36:24 +0200
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To: Lauri Kasanen <cand@gmx.com>
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On Fri, 28 Feb 2014 17:30:39 +0200
Lauri Kasanen <cand@gmx.com> wrote:

> On Fri, 28 Feb 2014 10:36:59 +0100
> Christian K=F6nig <deathsimple@vodafone.de> wrote:
> =

> > Am 27.02.2014 22:38, schrieb Lauri Kasanen:
> > > Without this, a bo may get created in the cpu-inaccessible vram.
> > > Before the CP engines get setup, all copies are done via cpu memcpy.
> > >
> > > This means that the cpu tries to read from inaccessible memory, fails,
> > > and the radeon module proceeds to disable acceleration.
> > >
> > > Doing this has no downsides, as the real VRAM size gets set as soon a=
s the
> > > CP engines get init.
> > >
> > > This is a candidate for 3.14 fixes.
> > =

> > This should be unnecessary, since TTM gets initialized only seeing the =

> > visible VRAM and later on radeon_ttm_set_active_vram_size gets called t=
o =

> > increase the limit.
> > =

> > If this isn't the case any more we should figure out why instead of =

> > working around it like this.
> =

> Negative, TTM gets initialized with real_vram just a few lines above
> this patch, not visible_vram.

git blame shows 7a50f01a from 2009, "drm/radeon/kms: vram sizing on
certain r100 chips needs workaround." by Dave Airlie.

So the TTM VRAM init has been wrong for five years, and only worked by
accident because until now all allocations were done bottom-up.

- Lauri