From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhenyu Wang Subject: Re: [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type Date: Tue, 24 Jun 2014 10:59:44 +0800 Message-ID: <20140624025944.GJ1045@zhen-hp.sh.intel.com> References: <1403171631-3452-1-git-send-email-tiejun.chen@intel.com> Reply-To: Zhenyu Wang Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1802418109==" Return-path: In-Reply-To: <1403171631-3452-1-git-send-email-tiejun.chen@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Tiejun Chen Cc: xen-devel@lists.xensource.com, airlied@linux.ie, daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, qemu-devel@nongnu.org, dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============1802418109== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="WVXhfWX7iGQecmy9" Content-Disposition: inline --WVXhfWX7iGQecmy9 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 2014.06.19 17:53:51 +0800, Tiejun Chen wrote: > Originally the reason to probe ISA bridge instead of Dev31:Fun0 > is to make graphics device passthrough work easy for VMM, that > only need to expose ISA bridge to let driver know the real > hardware underneath. This is a requirement from virtualization > team. Especially in that virtualized environments, XEN, there > is irrelevant ISA bridge in the system with that legacy qemu > version specific to xen, qemu-xen-traditional. So to work > reliably, we should scan through all the ISA bridge devices > and check for the first match, instead of only checking the > first one. >=20 > But actually, qemu-xen-traditional, is always enumerated with > Dev31:Fun0, 00:1f.0 as follows: >=20 > hw/pt-graphics.c: >=20 > intel_pch_init() > | > + pci_isa_bridge_init(bus, PCI_DEVFN(0x1f, 0), ...); >=20 > so this mean that isa bridge is still represented with Dev31:Func0 > like the native OS. Furthermore, currently we're pushing VGA > passthrough support into qemu upstream, and with some discussion, > we wouldn't set the bridge class type and just expose this devfn. >=20 > So we just go back to check devfn to make life normal. >=20 > Signed-off-by: Tiejun Chen This was added historically when supporting graphics device passthrough. Looks qemu upstream can't accept multiple ISA bridge and our PCH is always on device 31: func0 as far as I know. Looks good to me. Reviewed-by: Zhenyu Wang =20 --=20 Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 --WVXhfWX7iGQecmy9 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEARECAAYFAlOo6aAACgkQsQQaM014GCfsmwCdH/Yhg7VTwHZf+Jrry3AMg9fE jvIAnjqw/ia/2ySLY9IyoNKpOjKsdTPh =9D1i -----END PGP SIGNATURE----- --WVXhfWX7iGQecmy9-- --===============1802418109== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1802418109==--