From: Russell King - ARM Linux <linux@arm.linux.org.uk>
To: Thomas Hellstrom <thellstrom@vmware.com>
Cc: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
Daniel Vetter <daniel.vetter@intel.com>
Subject: Re: [PATCH] drm/mm: Support 4 GiB and larger ranges
Date: Tue, 27 Jan 2015 21:26:27 +0000 [thread overview]
Message-ID: <20150127212627.GO26493@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <54C74CDE.2010409@vmware.com>
On Tue, Jan 27, 2015 at 09:31:26AM +0100, Thomas Hellstrom wrote:
> On 01/27/2015 09:15 AM, Thierry Reding wrote:
> > Are you referring to the 4 GiB - 1 comment? The point I was trying to
> > make is not that the granularity of the IOVA space needs to be 1 byte
> > but rather that using an unsigned long for a size on a 32-bit machine
> > will give you 4 GiB - 1 addresses. The IOMMU page size is still 4 KiB
> > for Tegra.
>
> I was rather referring to that if the range manager (drm_mm) is set up
> to manage pages instead of bytes
> (like, for example, the TTM VM address space), you'd get 4G - 1 pages,
> which, I believe, is sufficient on most 32 bit systems?
It'd probably also be more efficient on 32-bit systems rather than
shifting them over to using 64-bit quantities.
If the allocation granularity were to move to pages, would it be worth
moving to a pfn-based addressing system too, rather than sticking with
a byte address there too?
--
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.
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next prev parent reply other threads:[~2015-01-27 21:26 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-23 8:05 [PATCH] drm/mm: Support 4 GiB and larger ranges Thierry Reding
2015-01-26 22:51 ` Dave Airlie
2015-01-27 6:07 ` Thomas Hellstrom
2015-01-27 8:15 ` Thierry Reding
2015-01-27 8:31 ` Thomas Hellstrom
2015-01-27 21:26 ` Russell King - ARM Linux [this message]
2015-01-27 9:22 ` Chris Wilson
2015-01-26 23:09 ` Alex Deucher
2015-03-04 16:20 ` Alex Deucher
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