From mboxrd@z Thu Jan  1 00:00:00 1970
From: Mark Brown <broonie@kernel.org>
Subject: Re: [PATCH 01/12] drm/amdgpu: add amd_gnb_bus support
Date: Fri, 7 Aug 2015 11:25:08 +0100
Message-ID: <20150807102508.GL20873@sirena.org.uk>
References: <1438871112-25946-1-git-send-email-alexander.deucher@amd.com>
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To: Alex Deucher <alexdeucher@gmail.com>
Cc: Chunming Zhou <david1.zhou@amd.com>, alsa-devel@alsa-project.org, maruthi.bayyavarapu@amd.com, tiwai@suse.de, lgirdwood@gmail.com, dri-devel@lists.freedesktop.org, Alex Deucher <alexander.deucher@amd.com>, airlied@gmail.com
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On Thu, Aug 06, 2015 at 10:25:02AM -0400, Alex Deucher wrote:
> From: Chunming Zhou <david1.zhou@amd.com>
>=20
> This is used by the incoming ACP driver.  The DMA
> engine for the i2s audio codec is part of the GPU.
>=20
> This exposes an amd gnb bus for the i2s codec to
> hang off of.

Could you be more specific about what an "amd gnd bus" is please?

> +enum amd_gnb_bus_ip {
> +	AMD_GNB_IP_ACP_DMA,
> +	AMD_GNB_IP_ACP_I2S,
> +	AMD_GNB_IP_ACP_PCM,
> +	AMD_GNB_IP_ISP,
> +	AMD_GNB_IP_NUM
> +};
> +
> +struct amd_gnb_bus_dev {
> +	struct device dev; /* generic device interface */
> +	enum amd_gnb_bus_ip ip;
> +	/* private data can be acp_handle/isp_handle etc.*/
> +	void *private_data;
> +};

Looking at the code I'm not seeing too much bus specific except for the
above which looks like the sort of device we usually represent as a MFD
(with the MFD providing resource distribution and arbitration between
various component devices which fit into the subsystem).  Why code a new
bus for this device?

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