From: Mark Brown <broonie@kernel.org>
To: Stefan Agner <stefan@agner.ch>
Cc: Meng Yi <meng.yi@nxp.com>,
emil.l.velikov@gmail.com, dri-devel@lists.freedesktop.org,
alexander.stein@systec-electronic.com
Subject: Re: [PATCH] drm/fsl-dcu: Add gamma set for crtc
Date: Mon, 12 Sep 2016 17:35:38 +0100 [thread overview]
Message-ID: <20160912163538.GD27946@sirena.org.uk> (raw)
In-Reply-To: <2e11c68c43e2cc2d10b31a796c3d7025@agner.ch>
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On Mon, Sep 05, 2016 at 12:24:32AM -0700, Stefan Agner wrote:
> So, afaik, we deal with 3x 256 32-bit register which happen to be a
> different endianness on one SoC implementing the DCU IP...
That does sound like a second regmap then.
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next prev parent reply other threads:[~2016-09-12 16:35 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-15 8:50 [PATCH] drm/fsl-dcu: Add gamma set for crtc Meng Yi
2016-07-18 7:03 ` Daniel Vetter
2016-09-02 21:22 ` Stefan Agner
2016-09-03 10:49 ` Mark Brown
2016-09-05 7:24 ` Stefan Agner
2016-09-12 16:35 ` Mark Brown [this message]
2016-09-13 3:02 ` Meng Yi
2016-09-05 2:28 ` Meng Yi
2016-09-05 7:17 ` Stefan Agner
2016-09-05 7:32 ` Meng Yi
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