From: Dan Carpenter <dan.carpenter-QHcLZuEGTsvQT0dZR+AlfA@public.gmane.org>
To: Rex.Zhu-5C7GfCeVMHo@public.gmane.org
Cc: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: [bug report] drm/amdgpu: refine uvd4.2 init/stop code.
Date: Mon, 13 Feb 2017 21:58:15 +0300 [thread overview]
Message-ID: <20170213185815.GA29314@mwanda> (raw)
Hello Rex Zhu,
The patch 8b55d17eeea7: "drm/amdgpu: refine uvd4.2 init/stop code."
from Jan 20, 2017, leads to the following static checker warning:
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c:397 uvd_v4_2_stop()
info: ignoring unreachable code.
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c:407 uvd_v4_2_stop()
info: ignoring unreachable code.
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c:420 uvd_v4_2_stop()
info: ignoring unreachable code.
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
390 static void uvd_v4_2_stop(struct amdgpu_device *adev)
391 {
392 uint32_t i, j;
393 uint32_t status;
394
395 WREG32(mmUVD_RBC_RB_CNTL, 0x11010101);
396
397 for (i = 0; i < 10; ++i) {
398 for (j = 0; j < 100; ++j) {
399 status = RREG32(mmUVD_STATUS);
400 if (status & 2)
401 break;
402 mdelay(1);
403 }
404 break;
This i < 10 loops don't make sense because we break after the first
iteration... What is intended?
405 }
406
407 for (i = 0; i < 10; ++i) {
408 for (j = 0; j < 100; ++j) {
409 status = RREG32(mmUVD_LMI_STATUS);
410 if (status & 0xf)
411 break;
412 mdelay(1);
413 }
414 break;
^^^^^^
415 }
416
417 /* Stall UMC and register bus before resetting VCPU */
418 WREG32_P(mmUVD_LMI_CTRL2, 1 << 8, ~(1 << 8));
419
420 for (i = 0; i < 10; ++i) {
421 for (j = 0; j < 100; ++j) {
422 status = RREG32(mmUVD_LMI_STATUS);
423 if (status & 0x240)
424 break;
425 mdelay(1);
426 }
427 break;
^^^^^^
428 }
429
regards,
dan carpenter
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