From: Hans de Goede <hdegoede@redhat.com>
To: "Jani Nikula" <jani.nikula@linux.intel.com>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: Hans de Goede <hdegoede@redhat.com>,
intel-gfx <intel-gfx@lists.freedesktop.org>,
dri-devel@lists.freedesktop.org
Subject: [PATCH v2 05/10] drm/i915/dsi: Execute MIPI_SEQ_DEASSERT_RESET before calling device_ready()
Date: Tue, 28 Feb 2017 13:59:20 +0100 [thread overview]
Message-ID: <20170228125925.7020-5-hdegoede@redhat.com> (raw)
In-Reply-To: <20170228125925.7020-1-hdegoede@redhat.com>
Execute MIPI_SEQ_DEASSERT_RESET before putting the device in ready
state (LP-11), this is the sequence in which things should be done
according to the spec.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
---
drivers/gpu/drm/i915/intel_dsi.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 04fd01d..b7b8c6d 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -637,10 +637,13 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_ON);
msleep(intel_dsi->panel_on_delay);
- /* put device in ready state */
+ /* Deassert reset */
+ intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
+
+ /* Put device in ready state (LP-11) */
intel_dsi_device_ready(encoder);
- intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
+ /* Send initialization commands in LP mode */
intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_INIT_OTP);
/* Enable port in pre-enable phase itself because as per hw team
@@ -733,6 +736,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder,
intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_OFF);
intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DISPLAY_OFF);
+ /* Transition to LP-00 */
intel_dsi_clear_device_ready(encoder);
if (IS_BROXTON(dev_priv)) {
@@ -756,6 +760,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder,
I915_WRITE(DSPCLK_GATE_D, val);
}
+ /* Assert reset */
intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_ASSERT_RESET);
/* Power off, try both CRC pmic gpio and VBT */
--
2.9.3
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next prev parent reply other threads:[~2017-02-28 12:59 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-28 12:59 [PATCH v2 01/10] drm/i915/dsi: Document the panel enable / disable sequences from the spec Hans de Goede
2017-02-28 12:59 ` [PATCH v2 02/10] drm/i915/dsi: Drop bogus MIPI_SEQ_ASSERT_RESET before POWER_ON Hans de Goede
2017-02-28 12:59 ` [PATCH v2 03/10] drm/i915/dsi: Move MIPI_SEQ_POWER_ON/OFF calls together with pmic gpio calls Hans de Goede
2017-02-28 12:59 ` [PATCH v2 04/10] drm/i915/dsi: Group DPOunit clock gate workaround with PLL enable Hans de Goede
2017-02-28 12:59 ` Hans de Goede [this message]
2017-02-28 12:59 ` [PATCH v2 06/10] drm/i915/dsi: Group MIPI_SEQ_BACKLIGHT_ON/OFF with panel_[en|dis]able_backlight Hans de Goede
2017-02-28 12:59 ` [PATCH v2 07/10] drm/i915/dsi: Document always using v3 SHUTDOWN / MIPI_SEQ_DISPLAY_OFF order Hans de Goede
2017-02-28 12:59 ` [PATCH v2 08/10] drm/i915/dsi: Execute MIPI_SEQ_TEAR_OFF from intel_dsi_post_disable Hans de Goede
2017-02-28 12:59 ` [PATCH v2 09/10] drm/i915/dsi: Call MIPI_SEQ_TEAR_ON and DISPLAY_ON for cmd-mode (untested) Hans de Goede
2017-02-28 12:59 ` [PATCH v2 10/10] drm/i915/dsi: Skip delays for v3 VBTs in vid-mode Hans de Goede
2017-02-28 17:39 ` [PATCH v2 01/10] drm/i915/dsi: Document the panel enable / disable sequences from the spec Bob Paauwe
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